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spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2

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This commit is contained in:
Cao Sen Miao
2022-04-12 16:37:40 +08:00
parent 68d4c47b7e
commit 4418a855ba
57 changed files with 871 additions and 547 deletions
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10
components/bootloader_support/src/esp32/bootloader_esp32.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -175,16 +175,16 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
break;
case ESP_IMAGE_SPI_SPEED_80M:
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
break;
default:

24
components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
View File

@@ -104,17 +104,20 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
str = "40MHz";
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "30MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
str = "26.7MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "20MHz";
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "15MHz";
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "60MHz";
break;
default:
str = "20MHz";
str = "15MHz";
break;
}
ESP_LOGI(TAG, "SPI Speed : %s", str);
@@ -184,13 +187,6 @@ static void bootloader_spi_flash_resume(void)
static esp_err_t bootloader_init_spi_flash(void)
{
bootloader_init_flash_configure();
#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
if (spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_SPI && spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI) {
ESP_LOGE(TAG, "SPI flash pins are overridden. Enable CONFIG_SPI_FLASH_ROM_DRIVER_PATCH in menuconfig");
return ESP_FAIL;
}
#endif
bootloader_spi_flash_resume();
bootloader_flash_unlock();

10
components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -113,16 +113,16 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
break;
case ESP_IMAGE_SPI_SPEED_80M:
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
break;
default:

20
components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -109,20 +109,20 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
str = "40MHz";
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "24MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
str = "26.7MHz";
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "16MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
str = "20MHz";
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "12MHz";
break;
case ESP_IMAGE_SPI_SPEED_80M:
str = "80MHz";
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "48MHz";
break;
default:
str = "20MHz";
str = "12MHz";
break;
}
ESP_LOGI(TAG, "SPI Speed : %s", str);

10
components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -120,16 +120,16 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
break;
case ESP_IMAGE_SPI_SPEED_80M:
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
break;
default:

10
components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -123,16 +123,16 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_40M:
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
break;
case ESP_IMAGE_SPI_SPEED_26M:
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
break;
case ESP_IMAGE_SPI_SPEED_20M:
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
break;
case ESP_IMAGE_SPI_SPEED_80M:
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
break;
default: