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Merge branch 'feature/toolchain_2020r1-RC1' into 'master'

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Toolchain 2020r1 support bringing (esp32, esp32s2)

See merge request espressif/esp-idf!7509
This commit is contained in:
Ivan Grokhotkov
2020-04-01 18:17:28 +08:00
parent 05d95c0e7e d1d91ec3dd
commit 168660aebf
18 changed files with 163 additions and 68 deletions
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2
components/app_trace/CMakeLists.txt
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@@ -39,4 +39,4 @@ target_compile_options(${COMPONENT_LIB} PRIVATE "-fno-profile-arcs" "-fno-test-c
# Force app_trace to also appear later than gcov in link line
idf_component_get_property(app_trace app_trace COMPONENT_LIB)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${app_trace}> gcov $<TARGET_FILE:${app_trace}> ${LIBC})
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${app_trace}> gcov $<TARGET_FILE:${app_trace}> c)

14
components/esp32/CMakeLists.txt
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@@ -96,5 +96,19 @@ else()
target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-issue)
# also, make sure we link with this option so correct toolchain libs are pulled in
target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-issue)
# set strategy selected
# note that we don't need to set link options as the library linked is independent of this
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST)
target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=dupldst)
target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=dupldst)
endif()
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW)
target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=memw)
target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=memw)
endif()
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS)
target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=nops)
target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=nops)
endif()
endif()
endif()

34
components/esp32/Kconfig
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@@ -129,6 +129,40 @@ menu "ESP32-specific"
The workaround is not required for ESP32 revision 3 and above.
menu "SPIRAM cache workaround debugging"
choice SPIRAM_CACHE_WORKAROUND_STRATEGY
prompt "Workaround strategy"
depends on SPIRAM_CACHE_WORKAROUND
default SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
help
Select the workaround strategy. Note that the strategy for precompiled
libraries (libgcc, newlib, bt, wifi) is not affected by this selection.
Unless you know you need a different strategy, it's suggested you stay
with the default MEMW strategy. Note that DUPLDST can interfere with hardware
encryption and this will be automatically disabled if this workaround is selected.
'Insert nops' is the workaround that was used in older esp-idf versions. This workaround
still can cause faulty data transfers from/to SPI RAM in some situation.
config SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
bool "Insert memw after vulnerable instructions (default)"
config SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
bool "Duplicate LD/ST for 32-bit, memw for 8/16 bit"
config SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS
bool "Insert nops between vulnerable loads/stores (old strategy, obsolete)"
endchoice
#This needs to be Y only for the dupldst workaround
config SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
bool
default "y" if SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
endmenu
config SPIRAM_BANKSWITCH_ENABLE
bool "Enable bank switching for >4MiB external RAM"
default y

21
components/esp32/Makefile.projbuild
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@@ -1,9 +1,24 @@
# Enable psram cache bug workaround in compiler if selected
ifdef CONFIG_SPIRAM_CACHE_WORKAROUND
CFLAGS+=-mfix-esp32-psram-cache-issue
CXXFLAGS+=-mfix-esp32-psram-cache-issue
LDFLAGS+=-mfix-esp32-psram-cache-issue
SPIRAM_CACHE_WORKAROUND_FLAGS = -mfix-esp32-psram-cache-issue
ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=dupldst
endif
ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=memw
endif
ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS
SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=nops
endif
CFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
CXXFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
LDFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
endif
# Enable dynamic esp_timer overflow value if building unit tests
ifneq ("$(filter esp32,$(TEST_COMPONENTS_LIST))","")

10
components/esp32/project_include.cmake
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@@ -4,6 +4,16 @@ if(CONFIG_SPIRAM_CACHE_WORKAROUND)
# non-IDF CMakeLists.txt file is imported into a component) don't depend
# on the esp32 component so don't get the extra flag. This handles that case.
idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-issue" APPEND)
# note that we don't need to set link options as the library linked is independent of this
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST)
idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=dupldst" APPEND)
endif()
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW)
idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=memw" APPEND)
endif()
if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS)
idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=nops" APPEND)
endif()
endif()
# Check toolchain is configured properly in cmake

15
components/esp32/test/test_sha.c
View File

@@ -14,6 +14,7 @@
#include "mbedtls/sha256.h"
#include "mbedtls/sha512.h"
#include "esp32/sha.h"
#include "ccomp_timer.h"
/* Note: Most of the SHA functions are called as part of mbedTLS, so
are tested as part of mbedTLS tests. Only esp_sha() is different.
@@ -25,7 +26,7 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
{
const size_t BUFFER_SZ = 32 * 1024 + 6; // NB: not an exact multiple of SHA block size
int64_t begin, end;
int64_t elapsed;
uint32_t us_sha1, us_sha512;
uint8_t sha1_result[20] = { 0 };
uint8_t sha512_result[64] = { 0 };
@@ -45,19 +46,19 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
0x1e, 0x07, 0xc6, 0xa2, 0x9e, 0x3b, 0x65, 0x75,
0x80, 0x7d, 0xe6, 0x6e, 0x47, 0x61, 0x2c, 0x94 };
begin = esp_timer_get_time();
ccomp_timer_start();
esp_sha(SHA1, buffer, BUFFER_SZ, sha1_result);
end = esp_timer_get_time();
elapsed = ccomp_timer_stop();
TEST_ASSERT_EQUAL_HEX8_ARRAY(sha1_expected, sha1_result, sizeof(sha1_expected));
us_sha1 = end - begin;
us_sha1 = elapsed;
ESP_LOGI(TAG, "esp_sha() 32KB SHA1 in %u us", us_sha1);
begin = esp_timer_get_time();
ccomp_timer_start();
esp_sha(SHA2_512, buffer, BUFFER_SZ, sha512_result);
end = esp_timer_get_time();
elapsed = ccomp_timer_stop();
TEST_ASSERT_EQUAL_HEX8_ARRAY(sha512_expected, sha512_result, sizeof(sha512_expected));
us_sha512 = end - begin;
us_sha512 = elapsed;
ESP_LOGI(TAG, "esp_sha() 32KB SHA512 in %u us", us_sha512);
free(buffer);

4
components/idf_test/include/idf_performance.h
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@@ -72,10 +72,10 @@
#endif
#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_4BIT
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_4BIT 12500
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_4BIT 12200
#endif
#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_4BIT
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_4BIT 12500
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_4BIT 12200
#endif
#ifndef IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_1BIT
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_1BIT 4000

3
components/mbedtls/Kconfig
View File

@@ -189,6 +189,7 @@ menu "mbedTLS"
config MBEDTLS_HARDWARE_AES
bool "Enable hardware AES acceleration"
default y
depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
help
Enable hardware accelerated AES encryption & decryption.
@@ -220,6 +221,7 @@ menu "mbedTLS"
config MBEDTLS_HARDWARE_MPI
bool "Enable hardware MPI (bignum) acceleration"
default y
depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
help
Enable hardware accelerated multiple precision integer operations.
@@ -231,6 +233,7 @@ menu "mbedTLS"
config MBEDTLS_HARDWARE_SHA
bool "Enable hardware SHA acceleration"
default y
depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
help
Enable hardware accelerated SHA1, SHA256, SHA384 & SHA512 in mbedTLS.

6
components/newlib/CMakeLists.txt
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@@ -25,7 +25,7 @@ idf_component_register(SRCS "${srcs}"
# Toolchain libraries require code defined in this component
idf_component_get_property(newlib newlib COMPONENT_LIB)
target_link_libraries(${COMPONENT_LIB} INTERFACE ${LIBC} ${LIBM} gcc "$<TARGET_FILE:${newlib}>")
target_link_libraries(${COMPONENT_LIB} INTERFACE c m gcc "$<TARGET_FILE:${newlib}>")
set_source_files_properties(heap.c PROPERTIES COMPILE_FLAGS -fno-builtin)
@@ -36,3 +36,7 @@ list(APPEND EXTRA_LINK_FLAGS "-u newlib_include_heap_impl")
list(APPEND EXTRA_LINK_FLAGS "-u newlib_include_syscalls_impl")
list(APPEND EXTRA_LINK_FLAGS "-u newlib_include_pthread_impl")
target_link_libraries(${COMPONENT_LIB} INTERFACE "${EXTRA_LINK_FLAGS}")
if(CONFIG_NEWLIB_NANO_FORMAT)
target_link_libraries(${COMPONENT_LIB} INTERFACE "--specs=nano.specs")
endif()

7
components/newlib/project_include.cmake
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@@ -1,7 +0,0 @@
if(CONFIG_NEWLIB_NANO_FORMAT)
set(LIBC c_nano)
else()
set(LIBC c)
endif()
set(LIBM m)

10
components/soc/include/soc/spinlock.h
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@@ -22,6 +22,12 @@
#include "xtensa/xtruntime.h"
#ifdef CONFIG_SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
#define NEED_VOLATILE_MUX volatile
#else
#define NEED_VOLATILE_MUX
#endif
#define SPINLOCK_FREE 0xB33FFFFF
#define SPINLOCK_WAIT_FOREVER (-1)
#define SPINLOCK_NO_WAIT 0
@@ -29,8 +35,8 @@
#define CORE_ID_REGVAL_XOR_SWAP (0xCDCD ^ 0xABAB)
typedef struct {
uint32_t owner;
uint32_t count;
NEED_VOLATILE_MUX uint32_t owner;
NEED_VOLATILE_MUX uint32_t count;
}spinlock_t;
/**