241 lines
3.8 KiB
ArmAsm
241 lines
3.8 KiB
ArmAsm
/* Startup code for ZPU
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Copyright (C) 2005 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file with other programs, and to distribute
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those programs without any restriction coming from the use of this
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file. (The General Public License restrictions do apply in other
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respects; for example, they cover modification of the file, and
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distribution when not linked into another program.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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.file "crt0.S"
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; .section ".fixed_vectors","ax"
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; KLUDGE!!! we remove the executable bit to avoid relaxation
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.section ".fixed_vectors","a"
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; DANGER!!!!
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; we need to align these code sections to 32 bytes, which
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; means we must not use any assembler instructions that are relaxed
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; at linker time
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; DANGER!!!!
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.macro fixedim value
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im \value
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.endm
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.macro jsr address
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im 0 ; save R0
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load
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im 4 ; save R1
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load
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im 8 ; save R2
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load
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fixedim \address
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call
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im 8
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store ; restore R2
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im 4
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store ; restore R1
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im 0
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store ; restore R0
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.endm
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.macro jmp address
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fixedim \address
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poppc
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.endm
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.macro fast_neg
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not
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im 1
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add
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.endm
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.macro cimpl funcname
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; save R0
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im 0
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load
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; save R1
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im 4
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load
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; save R2
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im 8
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load
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loadsp 20
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loadsp 20
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fixedim \funcname
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call
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; destroy arguments on stack
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storesp 0
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storesp 0
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im 0
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load
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; poke the result into the right slot
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storesp 24
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; restore R2
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im 8
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store
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; restore R1
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im 4
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store
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; restore r0
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im 0
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store
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storesp 4
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poppc
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.endm
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.macro mult1bit
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; create mask of lowest bit in A
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loadsp 8 ; A
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im 1
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and
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im -1
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add
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not
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loadsp 8 ; B
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and
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add ; accumulate in C
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; shift B left 1 bit
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loadsp 4 ; B
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addsp 0
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storesp 8 ; B
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; shift A right 1 bit
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loadsp 8 ; A
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flip
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addsp 0
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flip
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storesp 12 ; A
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.endm
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/* vectors */
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.balign 32,0
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# offset 0x0000 0000
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.globl _start
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_start:
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; intSp must be 0 when we jump to _premain
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; im 0xF3
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; loadsp 0
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; im _cpu_config
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; store
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; config
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jmp _premain
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.balign 8,0
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.globl _memreg
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_memreg:
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.long 0
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.long 0
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.long 0
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.long 0
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.balign 32,0
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# offset 0x0000 0020
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.globl _zpu_interrupt_vector
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_zpu_interrupt_vector:
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im 8+0 ; save R0
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load
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im 8+4 ; save R1
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load
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im 8+8 ; save R2
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load
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fixedim _inthandler_fptr
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load
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call
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im 8+8
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store ; restore R2
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im 8+4
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store ; restore R1
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im 8+0
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store ; restore R0
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poppc
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.section ".text","ax"
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.global _boot
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.balign 4,0
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_boot:
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im 0
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poppc
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.global _break;
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_break:
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breakpoint
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im _break
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poppc ; infinite loop
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.global _app
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.balign 4,0
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_app:
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im 0x00002000
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poppc
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.global _inthandler_fptr
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.balign 4,0
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_inthandler_fptr:
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.long _default_inthandler
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_default_inthandler:
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poppc
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/* instruction emulation code */
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.globl _hardware
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_hardware:
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.long 0
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.globl _cpu_config
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_cpu_config:
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.long 0
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; .data ; This is read only, so we don't really want it in a normal data section
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.section ".rodata"
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.balign 4,0
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_mask:
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.long 0x00ffffff
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.long 0xff00ffff
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.long 0xffff00ff
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.long 0xffffff00
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