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Removed MEMCLK as it was part of an idea to double clock the memory

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This commit is contained in:
Philip Smart
2019-11-01 16:49:34 +00:00
parent 99914a94a8
commit 3d7318353d
4 changed files with 54 additions and 10 deletions
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2
cpu/zpu_core_evo.vhd
View File

@@ -674,6 +674,7 @@ begin
-- If wishbone interface is active and an ACK is received, deassert the signals.
if IMPL_USE_WB_BUS = true and wbXactActive = '1' and WB_ACK_I = '1' and WB_HALT_I = '0' and mxHoldCycles = 0 then
wbXactActive <= '0';
WB_WE_O <= '0';
WB_CYC_O <= '0';
WB_STB_O <= '0';
end if;
@@ -681,6 +682,7 @@ begin
-- TODO: WB_ERR_I needs better handling, should retry at least once and then issue a BREAK.
if IMPL_USE_WB_BUS = true and WB_ERR_I = '1' then
wbXactActive <= '0';
WB_WE_O <= '0';
WB_CYC_O <= '0';
WB_STB_O <= '0';
end if;

45
software/apps/mtest/mtest.c
View File

@@ -66,6 +66,37 @@ void test8bit(uint32_t start, uint32_t end)
unsigned long count;
uint8_t data;
xprintf( "\rR/W 8bit ascending test pattern... " );
memPtr = (unsigned char*)( start );
data = 0x00;
count = end - start;
while ( count-- )
{
*memPtr = data;
if ( *memPtr != data )
xprintf( "\rError (8bit rwap) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
*memPtr++;
data++;
if ( data >= 0xFF )
data = 0x00;
}
xprintf( "\rR/W 8bit walking test pattern... " );
memPtr = (unsigned char*)( start );
data = 0x55;
count = end - start;
while ( count-- )
{
*memPtr = data;
if ( *memPtr != data )
xprintf( "\rError (8bit rwwp) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
*memPtr++;
if ( data == 0x55 )
data = 0xAA;
else
data = 0x55;
}
xprintf( "\rWrite 8bit ascending test pattern... " );
memPtr = (unsigned char*)( start );
data = 0x00;
@@ -84,7 +115,12 @@ void test8bit(uint32_t start, uint32_t end)
while ( count-- )
{
if ( *memPtr != data )
xprintf( "\rError (8bit ap) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
{
if ( *memPtr != data )
xprintf( "\rError (8bit ap2) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
else
xprintf( "\rError (8bit ap) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
}
*memPtr++;
data++;
if ( data >= 0xFF )
@@ -111,7 +147,12 @@ void test8bit(uint32_t start, uint32_t end)
while ( count-- )
{
if ( *memPtr != data )
xprintf( "\rError (8bit wp) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
{
if ( *memPtr != data )
xprintf( "\rError (8bit wp2) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
else
xprintf( "\rError (8bit wp) at 0x%08lX (%02x:%02x)\n", memPtr, *memPtr, data );
}
*memPtr++;
if ( data == 0x55 )
data = 0xAA;

9
zpu_soc.vhd
View File

@@ -662,7 +662,7 @@ begin
addrbits => SOC_MAX_ADDR_BRAM_BIT
)
port map (
clk => MEMCLK,
clk => SYSCLK,
memAAddr => MEM_ADDR(ADDR_BIT_BRAM_RANGE),
memAWriteEnable => BRAM_WREN,
memAWriteByte => MEM_WRITE_BYTE_ENABLE,
@@ -683,7 +683,7 @@ begin
addrbits => SOC_MAX_ADDR_BRAM_BIT
)
port map (
clk => MEMCLK,
clk => SYSCLK,
memAAddr => MEM_ADDR(ADDR_BIT_BRAM_RANGE),
memAWriteEnable => BRAM_WREN,
memAWriteByte => MEM_WRITE_BYTE_ENABLE,
@@ -700,7 +700,7 @@ begin
addrbits => SOC_MAX_ADDR_RAM_BIT
)
port map (
clk => MEMCLK,
clk => SYSCLK,
memAAddr => MEM_ADDR(ADDR_BIT_RAM_RANGE),
memAWriteEnable => RAM_WREN,
memAWriteByte => MEM_WRITE_BYTE_ENABLE,
@@ -1769,7 +1769,8 @@ begin
-- );
-- RAM Range SOC_ADDR_RAM_START) -> SOC_ADDR_RAM_END
RAM_SELECT <= '1' when (ZPU_EVO = 1 or ZPU_EVO_MINIMAL = 1) and (WB_ADR_O >= std_logic_vector(to_unsigned(SOC_ADDR_RAM_START, WB_ADR_O'LENGTH)) and WB_ADR_O < std_logic_vector(to_unsigned(SOC_ADDR_RAM_END, WB_ADR_O'LENGTH)))
-- RAM_SELECT <= '1' when (ZPU_EVO = 1 or ZPU_EVO_MINIMAL = 1) and (WB_ADR_O >= std_logic_vector(to_unsigned(SOC_ADDR_RAM_START, WB_ADR_O'LENGTH)) and WB_ADR_O < std_logic_vector(to_unsigned(SOC_ADDR_RAM_END, WB_ADR_O'LENGTH)))
RAM_SELECT <= '1' when (ZPU_EVO = 1 or ZPU_EVO_MINIMAL = 1) and (WB_ADR_O >= std_logic_vector(to_unsigned(SOC_ADDR_RAM_START, WB_ADR_O'LENGTH)) and WB_ADR_O < std_logic_vector(to_unsigned(SOC_ADDR_RAM_END - 8192, WB_ADR_O'LENGTH)))
else '0';
-- Enable write to RAM when selected and CPU in write state.

8
zpu_soc_pkg.vhd
View File

@@ -98,8 +98,8 @@ package zpu_soc_pkg is
constant SOC_MAX_ADDR_BRAM_BIT : integer := 16; -- Max address bit of the System BRAM ROM/Stack in bytes, ie. 15 = 32KB or 8K 32bit words. NB. For non evo CPUS you must adjust the maxMemBit parameter in zpu_pkg.vhd to be the same.
constant SOC_ADDR_BRAM_START : integer := 0; -- Start address of BRAM.
constant SOC_ADDR_BRAM_END : integer := SOC_ADDR_BRAM_START+(2**SOC_MAX_ADDR_BRAM_BIT); -- End address of BRAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
constant SOC_MAX_ADDR_RAM_BIT : integer := 23; -- Max address bit of the System RAM.
constant SOC_ADDR_RAM_START : integer := 16777216; -- Start address of RAM.
constant SOC_MAX_ADDR_RAM_BIT : integer := 24; -- Max address bit of the System RAM.
constant SOC_ADDR_RAM_START : integer := (2**(maxAddrBit-WB_ACTIVE)); -- Start address of RAM.
constant SOC_ADDR_RAM_END : integer := SOC_ADDR_RAM_START+(2**SOC_MAX_ADDR_RAM_BIT); -- End address of RAM = START + 2^SOC_MAX_ADDR_INSN_BRAM_BIT.
constant SOC_MAX_ADDR_INSN_BRAM_BIT: integer := SOC_MAX_ADDR_BRAM_BIT; -- Max address bit of the dedicated instruction BRAM in bytes, ie. 15 = 32KB or 8K 32bit words.
constant SOC_ADDR_INSN_BRAM_START : integer := 0; -- Start address of dedicated instrution BRAM.
@@ -109,8 +109,8 @@ package zpu_soc_pkg is
constant SOC_STACK_ADDR : integer := SOC_ADDR_BRAM_END - 8; -- Stack start address (BRAM/RAM).
constant SOC_ADDR_IO_START : integer := (2**(maxAddrBit-WB_ACTIVE)) - (2**maxIOBit); -- Start address of the Evo Direct Memory Mapped IO region.
constant SOC_ADDR_IO_END : integer := (2**(maxAddrBit-WB_ACTIVE)) - 1; -- End address of the Evo Direct Memory Mapped IO region.
constant SOC_WB_IO_START : integer := 32505856; -- Start address of IO range.
constant SOC_WB_IO_END : integer := 33554431; -- End address of IO range.
constant SOC_WB_IO_START : integer := (2**(maxAddrBit)) - (2**maxIOBit); -- Start address of IO range.
constant SOC_WB_IO_END : integer := (2**(maxAddrBit)) - 1; -- End address of IO range.
-- Ranges used throughout the SOC source.
subtype ADDR_BIT_BRAM_RANGE is natural range SOC_MAX_ADDR_BRAM_BIT-1 downto 0; -- Address range of the onboard B(lock)RAM - 1 byte aligned