# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ledwater_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13
set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:35:58  SEPTEMBER 01, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.1 Standard Edition"
set_global_assignment -name CDF_FILE E115.cdf

# Pin & Location Assignments
# ==========================

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name TOP_LEVEL_ENTITY E115_zpu

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP4CE115F23I7
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256

# Assembler Assignments
# =====================

set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON
set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"

set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0




#============================================================
# UART
#============================================================
set_location_assignment PIN_A7 -to UART_RX_0
set_location_assignment PIN_B7 -to UART_TX_0
set_location_assignment PIN_C6 -to UART_RX_1
set_location_assignment PIN_D7 -to UART_TX_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TX_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RX_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TX_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RX_1
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to UART_TX_0
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to UART_TX_1

#============================================================
# SD CARD
#============================================================
set_location_assignment PIN_C8 -to SDCARD_MISO[0]
set_location_assignment PIN_C7 -to SDCARD_MOSI[0]
set_location_assignment PIN_B8 -to SDCARD_CLK[0]
set_location_assignment PIN_A8 -to SDCARD_CS[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCARD_MISO[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCARD_MOSI[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCARD_CLK[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCARD_CS[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_MOSI[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_CLK[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCARD_CS[0]

#============================================================
# CLOCK
#============================================================
set_location_assignment PIN_AB11 -to CLOCK_25
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_25
#set_location_assignment PIN_AB11 -to clk_25M

#============================================================
# LED
#============================================================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
set_location_assignment PIN_A5 -to LED[0]
set_location_assignment PIN_B5 -to LED[1]
set_location_assignment PIN_C4 -to LED[2]
set_location_assignment PIN_C3 -to LED[3]

#============================================================
# DDR2 DRAM
#============================================================
#set_location_assignment PIN_AA20 -to DDR2_ADDR[13]
#set_location_assignment PIN_V8 -to DDR2_ADDR[12]
#set_location_assignment PIN_AB6 -to DDR2_ADDR[11]
#set_location_assignment PIN_K22 -to DDR2_ADDR[10]
#set_location_assignment PIN_W10 -to DDR2_ADDR[9]
#set_location_assignment PIN_T19 -to DDR2_ADDR[8]
#set_location_assignment PIN_Y14 -to DDR2_ADDR[7]
#set_location_assignment PIN_W14 -to DDR2_ADDR[6]
#set_location_assignment PIN_T20 -to DDR2_ADDR[5]
#set_location_assignment PIN_Y15 -to DDR2_ADDR[4]
#set_location_assignment PIN_L22 -to DDR2_ADDR[3]
#set_location_assignment PIN_Y17 -to DDR2_ADDR[2]
#set_location_assignment PIN_L21 -to DDR2_ADDR[1]
#set_location_assignment PIN_AB10 -to DDR2_ADDR[0]
#set_location_assignment PIN_Y6 -to DDR2_BA[2]
#set_location_assignment PIN_AB17 -to DDR2_BA[1]
#set_location_assignment PIN_K21 -to DDR2_BA[0]
#set_location_assignment PIN_J18 -to DDR2_CAS
#set_location_assignment PIN_Y4 -to DDR2_CKE[0]
#set_location_assignment PIN_AB5 -to DDR2_CKE[1]
#set_location_assignment PIN_AA19 -to DDR2_CS[0]
#set_location_assignment PIN_E21 -to DDR2_CS[1]
#
#set_location_assignment PIN_F20 -to DDR2_DM[7]
#set_location_assignment PIN_F22 -to DDR2_DM[6]
#set_location_assignment PIN_P22 -to DDR2_DM[5]
#set_location_assignment PIN_V22 -to DDR2_DM[4]
#set_location_assignment PIN_W15 -to DDR2_DM[3]
#set_location_assignment PIN_AA14 -to DDR2_DM[2]
#set_location_assignment PIN_AA8 -to DDR2_DM[1]
#set_location_assignment PIN_AA5 -to DDR2_DM[0]
# 
#set_location_assignment PIN_B21 -to DDR2_DQ[63]
#set_location_assignment PIN_B22 -to DDR2_DQ[62]
#set_location_assignment PIN_C21 -to DDR2_DQ[61]
#set_location_assignment PIN_C22 -to DDR2_DQ[60]
#set_location_assignment PIN_D22 -to DDR2_DQ[59]
#set_location_assignment PIN_F19 -to DDR2_DQ[58]
#set_location_assignment PIN_F17 -to DDR2_DQ[57]
#set_location_assignment PIN_G18 -to DDR2_DQ[56]
#set_location_assignment PIN_E22 -to DDR2_DQ[55]
#set_location_assignment PIN_F21 -to DDR2_DQ[54]
#set_location_assignment PIN_H21 -to DDR2_DQ[53]
#set_location_assignment PIN_H22 -to DDR2_DQ[52]
#set_location_assignment PIN_H19 -to DDR2_DQ[51]
#set_location_assignment PIN_H20 -to DDR2_DQ[50]
#set_location_assignment PIN_K18 -to DDR2_DQ[49]
#set_location_assignment PIN_J21 -to DDR2_DQ[48]
#set_location_assignment PIN_M22 -to DDR2_DQ[47]
#set_location_assignment PIN_M21 -to DDR2_DQ[46]
#set_location_assignment PIN_R22 -to DDR2_DQ[45]
#set_location_assignment PIN_R21 -to DDR2_DQ[44]
#set_location_assignment PIN_M20 -to DDR2_DQ[43]
#set_location_assignment PIN_N20 -to DDR2_DQ[42]
#set_location_assignment PIN_P21 -to DDR2_DQ[41]
#set_location_assignment PIN_R19 -to DDR2_DQ[40]
#set_location_assignment PIN_U22 -to DDR2_DQ[39]
#set_location_assignment PIN_U21 -to DDR2_DQ[38]
#set_location_assignment PIN_V21 -to DDR2_DQ[37]
#set_location_assignment PIN_W22 -to DDR2_DQ[36]
#set_location_assignment PIN_R20 -to DDR2_DQ[35]
#set_location_assignment PIN_U20 -to DDR2_DQ[34]
#set_location_assignment PIN_Y22 -to DDR2_DQ[33]
#set_location_assignment PIN_AA21 -to DDR2_DQ[32]
#set_location_assignment PIN_AB20 -to DDR2_DQ[31]
#set_location_assignment PIN_AB18 -to DDR2_DQ[30]
#set_location_assignment PIN_AA16 -to DDR2_DQ[29]
#set_location_assignment PIN_AB16 -to DDR2_DQ[28]
#set_location_assignment PIN_W17 -to DDR2_DQ[27]
#set_location_assignment PIN_V15 -to DDR2_DQ[26]
#set_location_assignment PIN_T15 -to DDR2_DQ[25]
#set_location_assignment PIN_V14 -to DDR2_DQ[24]
#set_location_assignment PIN_AA15 -to DDR2_DQ[23]
#set_location_assignment PIN_AB15 -to DDR2_DQ[22]
#set_location_assignment PIN_AB14 -to DDR2_DQ[21]
#set_location_assignment PIN_AA13 -to DDR2_DQ[20]
#set_location_assignment PIN_W13 -to DDR2_DQ[19]
#set_location_assignment PIN_U12 -to DDR2_DQ[18]
#set_location_assignment PIN_AB13 -to DDR2_DQ[17]
#set_location_assignment PIN_AA10 -to DDR2_DQ[16]
#set_location_assignment PIN_AA9 -to DDR2_DQ[15]
#set_location_assignment PIN_AB8 -to DDR2_DQ[14]
#set_location_assignment PIN_AB7 -to DDR2_DQ[13]
#set_location_assignment PIN_AA7 -to DDR2_DQ[12]
#set_location_assignment PIN_V11 -to DDR2_DQ[11]
#set_location_assignment PIN_Y10 -to DDR2_DQ[10]
#set_location_assignment PIN_U10 -to DDR2_DQ[9]
#set_location_assignment PIN_Y8 -to DDR2_DQ[8]
#set_location_assignment PIN_W8 -to DDR2_DQ[7]
#set_location_assignment PIN_V5 -to DDR2_DQ[6]
#set_location_assignment PIN_AA4 -to DDR2_DQ[5]
#set_location_assignment PIN_Y3 -to DDR2_DQ[4]
#set_location_assignment PIN_U9 -to DDR2_DQ[3]
#set_location_assignment PIN_W7 -to DDR2_DQ[2]
#set_location_assignment PIN_Y7 -to DDR2_DQ[1]
#set_location_assignment PIN_W6 -to DDR2_DQ[0]
#
#set_location_assignment PIN_C20 -to DDR2_DQS[7]
#set_location_assignment PIN_J22 -to DDR2_DQS[6]
#set_location_assignment PIN_N18 -to DDR2_DQS[5]
#set_location_assignment PIN_W20 -to DDR2_DQS[4]
#set_location_assignment PIN_V13 -to DDR2_DQS[3]
#set_location_assignment PIN_Y13 -to DDR2_DQS[2]
#set_location_assignment PIN_AB9 -to DDR2_DQS[1]
#set_location_assignment PIN_V10 -to DDR2_DQS[0]
#
#set_location_assignment PIN_AB19 -to DDR2_ODT[0]
#set_location_assignment PIN_D21 -to DDR2_ODT[1]
#set_location_assignment PIN_AA17 -to DDR2_RAS
#set_location_assignment PIN_J20 -to DDR2_WE

#============================================================
# Modules and Files
#============================================================

set_global_assignment -name VHDL_FILE ../E115_zpu_Toplevel.vhd
set_global_assignment -name QIP_FILE Clock_25to100.qip
set_global_assignment -name SDC_FILE E115_zpu_constraints.sdc
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_flex.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_pkg.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_small.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_medium.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_L2.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_core_evo_STcache.vhd
set_global_assignment -name VHDL_FILE ../cpu/zpu_uart_debug.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc_pkg.vhd
set_global_assignment -name VHDL_FILE ../zpu_soc.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/RAM/dpram.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/uart/uart.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/intr/interrupt_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/spi/spi.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/SDMMC/SDCard.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ps2/io_ps2_com.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/timer/timer_controller.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_BootROM.vhd
#set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_DualPort3264BootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_SinglePortBootBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/BRAM/zOS_SinglePortBRAM.vhd
set_global_assignment -name VHDL_FILE ../devices/sysbus/ioctl/ioctl.vhd
#set_global_assignment -name VHDL_FILE ../devices/sysbus/TCPU/tcpu.vhd
set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/48LC16M16.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/48LC16M16_cached.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/W9864G6.qip
#set_global_assignment -name QIP_FILE ../devices/sysbus/SDRAM/W9864G6_cached.qip
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_top.vhd
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_byte_ctrl.vhd
set_global_assignment -name VHDL_FILE ../devices/WishBone/I2C/i2c_master_bit_ctrl.vhd
set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/48LC16M16.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/48LC16M16_cached.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/W9864G6.qip
#set_global_assignment -name QIP_FILE ../devices/WishBone/SDRAM/W9864G6_cached.qip
set_global_assignment -name VHDL_FILE ../devices/WishBone/SRAM/sram.vhd
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION ON
set_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS OFF
set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON
set_global_assignment -name HDL_MESSAGE_LEVEL LEVEL3
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation

set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF











set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top