VERSION: WM1.0
MODULE: altpll
PRIVATE: ACTIVECLK_CHECK STRING "0"
PRIVATE: BANDWIDTH STRING "1.000"
PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
PRIVATE: BANDWIDTH_PRESET STRING "Low"
PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
PRIVATE: CLKLOSS_CHECK STRING "0"
PRIVATE: CLKSWITCH_CHECK STRING "1"
PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
PRIVATE: CREATE_INCLK1_CHECK STRING "0"
PRIVATE: CUR_DEDICATED_CLK STRING "c0"
PRIVATE: CUR_FBIN_CLK STRING "c0"
PRIVATE: DEVICE_SPEED_GRADE STRING "7"
PRIVATE: DIV_FACTOR0 NUMERIC "1"
PRIVATE: DIV_FACTOR1 NUMERIC "1"
PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000"
PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "100.000000"
PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1"
PRIVATE: GLOCKED_MODE_CHECK STRING "0"
PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"
PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
PRIVATE: LONG_SCAN_RADIO STRING "1"
PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
PRIVATE: MIRROR_CLK0 STRING "0"
PRIVATE: MIRROR_CLK1 STRING "0"
PRIVATE: MULT_FACTOR0 NUMERIC "1"
PRIVATE: MULT_FACTOR1 NUMERIC "1"
PRIVATE: NORMAL_MODE_RADIO STRING "1"
PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
PRIVATE: PHASE_SHIFT0 STRING "-2.00000000"
PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns"
PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
PRIVATE: PLL_ARESET_CHECK STRING "1"
PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
PRIVATE: PLL_ENA_CHECK STRING "0"
PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
PRIVATE: PLL_PFDENA_CHECK STRING "0"
PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
PRIVATE: RECONFIG_FILE STRING "Clock_50to100.mif"
PRIVATE: SACN_INPUTS_CHECK STRING "0"
PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
PRIVATE: SHORT_SCAN_RADIO STRING "0"
PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
PRIVATE: SPREAD_FREQ STRING "50.000"
PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
PRIVATE: SPREAD_PERCENT STRING "0.500"
PRIVATE: SPREAD_USE STRING "0"
PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
PRIVATE: STICKY_CLK0 STRING "1"
PRIVATE: STICKY_CLK1 STRING "1"
PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
PRIVATE: USE_CLK0 STRING "1"
PRIVATE: USE_CLK1 STRING "1"
PRIVATE: USE_CLKENA0 STRING "0"
PRIVATE: USE_CLKENA1 STRING "0"
PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
PRIVATE: ZERO_DELAY_RADIO STRING "0"
LIBRARY: altera_mf altera_mf.altera_mf_components.all
CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
CONSTANT: CLK0_PHASE_SHIFT STRING "-2000"
CONSTANT: CLK1_DIVIDE_BY NUMERIC "1"
CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2"
CONSTANT: CLK1_PHASE_SHIFT STRING "0"
CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
CONSTANT: GATE_LOCK_SIGNAL STRING "NO"
CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"
CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
CONSTANT: INVALID_LOCK_MULTIPLIER NUMERIC "5"
CONSTANT: LPM_TYPE STRING "altpll"
CONSTANT: OPERATION_MODE STRING "NORMAL"
CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
CONSTANT: PORT_ARESET STRING "PORT_USED"
CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
CONSTANT: PORT_INCLK0 STRING "PORT_USED"
CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
CONSTANT: PORT_LOCKED STRING "PORT_USED"
CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
CONSTANT: PORT_clk0 STRING "PORT_USED"
CONSTANT: PORT_clk1 STRING "PORT_USED"
CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
CONSTANT: VALID_LOCK_MULTIPLIER NUMERIC "1"
USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
USED_PORT: areset 0 0 0 0 INPUT GND "areset"
USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
CONNECT: @areset 0 0 0 0 areset 0 0 0 0
CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
CONNECT: c0 0 0 0 0 @clk 0 0 1 0
CONNECT: c1 0 0 0 0 @clk 0 0 1 1
CONNECT: locked 0 0 0 0 @locked 0 0 0 0
GEN_FILE: TYPE_NORMAL Clock_50to100.vhd TRUE
GEN_FILE: TYPE_NORMAL Clock_50to100.ppf TRUE
GEN_FILE: TYPE_NORMAL Clock_50to100.inc FALSE
GEN_FILE: TYPE_NORMAL Clock_50to100.cmp TRUE
GEN_FILE: TYPE_NORMAL Clock_50to100.bsf FALSE
GEN_FILE: TYPE_NORMAL Clock_50to100_inst.vhd FALSE
LIB_FILE: altera_mf

LICENSE_ID: "DEVICE_FAMILY_Cyclone 10 LP"	10915102B3011615119A
LICENSE_ID: "DEVICE_FAMILY_Cyclone IV E"	10915102A3011615119A
LICENSE_ID: "DEVICE_FAMILY_Cyclone V"	10915102T3011615119M
LICENSE_ID: "DEVICE_FAMILY_MAX V"	10915102H3011615119A
LICENSE_ID: "DEVICE_FAMILY_Arria II GX"	10915102P3011615119S
LICENSE_ID: "DEVICE_FAMILY_Cyclone IV GX"	10915102B3011615119A
LICENSE_ID: "DEVICE_FAMILY_MAX II"	10915102N3011615119S
LICENSE_ID: "DEVICE_FAMILY_MAX 10"	10915102N3011615119S
LICENSE_ID: "FEATURE_STRATIXGX_DPA"	10915102V3011615119C
LICENSE_ID: "FEATURE_STRATIXGX_BASIC"	10915102T3011615119M


SUPPORTED_DEVICE_FAMILY: "Cyclone 10 LP"
SUPPORTED_DEVICE_FAMILY: "Cyclone IV E"
SUPPORTED_DEVICE_FAMILY: "Arria II GX"
SUPPORTED_DEVICE_FAMILY: "Cyclone IV GX"
SUPPORTED_DEVICE_FAMILY: "MAX 10"
SUPPORTED_DEVICE_FAMILY: "Cyclone II"

WIZARD_TITLE: "ALTPLL"
QUARTUS_VERSION: "Version 17.0"
QUARTUS_SVERSION: "17.0.2 Build 602 07/19/2017 SJ Lite Edition:07/19/2017"
QUARTUS_BUILD_DATE: "07/19/2017"
ALTERA_COPYRIGHT: "Copyright (C) 2017  Intel Corporation. All rights reserved."


HELP_MENU_ITEM: FALSE "IUG$altpll Megafunction User Guide$http://www.altera.com/literature/ug/ug_altpll.pdf"
HELP_MENU_ITEM: FALSE "IUG$General-Purpose PLLs in Stratix (GX) Devices$http://www.altera.com/literature/hb/stx/ch_1_vol_2.pdf"
HELP_MENU_ITEM: FALSE "IUG$PLLs in Stratix II Devices$http://www.altera.com/literature/hb/stx2/stx2_sii52001.pdf"
HELP_MENU_ITEM: FALSE "IUG$Clock Networks and PLLs in Stratix III Devices$http://www.altera.com/literature/hb/stx3/stx3_siii51006.pdf	"
HELP_MENU_ITEM: FALSE "IUG$PLLs in Cyclone II Devices$http://www.altera.com/literature/hb/cyc2/cyc2_cii51007.pdf"
