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Version history / Change log.

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redcode
2022-07-02 08:04:08 +02:00
parent e342287778
commit 80e618bf95
2 changed files with 54 additions and 52 deletions
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documentation/VersionHistory.rst
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@@ -24,14 +24,14 @@ Changes:
13. Added public macros for checking the library version.
14. Added public macros with bit masks for working with flags.
15. Added public macros for accessing the 16-bit registers.
16. Added the ``z80_execute`` function to run a simplified emulation without RESET and interrupts.
17. Added the ``z80_refresh_address`` function to get the refresh address of the current M1 cycle.
18. Added the ``z80_in_cycle`` and ``z80_out_cycle`` functions to get the clock cycle on which the I/O M-cycle occurs, relative to the start of the instruction.
16. Added the ``z80_execute`` function for running a simplified emulation without RESET and interrupts.
17. Added the ``z80_refresh_address`` function for getting the refresh address of the current M1 cycle.
18. Added the ``z80_in_cycle`` and ``z80_out_cycle`` functions for obtaining the clock cycle at which the I/O M-cycle begins, relative to the start of the instruction.
19. Fixed a bug in the ``sll`` instruction.
20. Fixed a bug in the ``INX`` and ``OUTX`` macros affecting the S and N flags.
21. Fixed a bug in the ``OUTX`` macro affecting the MSByte of the port number.
22. Fixed the clock cycles of the ``dec XY`` and ``in (c)`` instructions.
23. Fixed the ``read_16`` function so that the order in which the compiler evaluates expressions does not affect the order of the memory read operations.
23. Fixed the ``read_16`` function so that the order of the memory read operations is not determined by the order in which the compiler evaluates expressions.
24. Fixed the order in which the memory write operations are performed when the SP register is involved. This affects the NMI response, the INT response in modes 1 and 2, and the following instructions: ``ex (sp),{hl|XY}``, ``push TT``, ``push XY``, ``call WORD``, ``call Z,WORD`` and ``rst N``.
25. Fixed the handling of illegal instructions to avoid stack overflows in long sequences of ``DDh/FDh`` prefixes.
26. Fixed several implicit conversions to avoid warnings about loss of sign and precision.
@@ -42,15 +42,15 @@ Changes:
31. Replaced all register resolution functions with macros.
32. Replaced all ``ld {J,K|O,P}`` instructions that have the same destination and source register with NOPs.
33. Reimplemented the HALT state. The emulation should now be fully accurate. HALTskip is also supported.
34. Added optional emulation of the normal and special RESET signals, along with the new ``z80_reset`` and ``z80_special_reset`` functions to emit them. The old ``z80_reset`` function is now called ``z80_instant_reset``.
35. Added the ``Z80::fetch_opcode`` and ``Z80::fetch`` callbacks to perform opcode fetch operations and memory read operations on instruction data respectively.
36. Added the ``Z80::nop callback`` to perform disregarded opcode fetch operations during internal NOP M-cycles.
34. Added optional emulation of the normal and special RESET signals, along with the new ``z80_reset`` and ``z80_special_reset`` functions for emitting them. The old ``z80_reset`` function is now called ``z80_instant_reset``.
35. Added the ``Z80::fetch_opcode`` and ``Z80::fetch`` callbacks for performing opcode fetch operations and memory read operations on instruction data respectively.
36. Added the ``Z80::nop`` callback for performing disregarded opcode fetch operations during internal NOP M-cycles.
37. Added emulation of the NMI acknowledge M-cycle through the new ``Z80::nmia`` callback.
38. Added emulation of the INT acknowledge M-cycle through the new ``Z80::inta`` callback, which replaces ``Z80::int_data``.
39. Added optional full emulation of the interrupt mode 0, along with the new ``Z80::int_fetch`` callback to perform bus read operations on instruction data. If not enabled at compile-time, the old simplified emulation is built, which supports only the most typical instructions.
40. Added four callbacks to notify the execution of important instructions: ``Z80::ld_i_a``, ``Z80::ld_r_a``, ``Z80::reti`` and ``Z80::retn``.
39. Added optional full emulation of the interrupt mode 0, along with the new ``Z80::int_fetch`` callback for performing bus read operations on instruction data. If not enabled at compile-time, the old simplified emulation is built, which supports only the most typical instructions.
40. Added four callbacks for notifying the execution of important instructions: ``Z80::ld_i_a``, ``Z80::ld_r_a``, ``Z80::reti`` and ``Z80::retn``.
41. Added hooking functionality through the ``ld h,h`` instruction and the new ``Z80::hook`` callback.
42. Added the ``Z80::illegal`` callback to delegate the emulation of illegal instructions.
42. Added the ``Z80::illegal`` callback for delegating the emulation of illegal instructions.
43. Added accurate flag behavior in the following instructions: ``ldir``, ``lddr``, ``cpir``, ``cpdr``, ``inir``, ``indr``, ``otir`` and ``otdr``.
44. Added emulation of the interrupt acceptance deferral that occurs during the ``reti`` and ``retn`` instructions.
45. Added MEMPTR emulation. The ``bit N,(hl)`` instruction now produces a correct value of F.