Illegal instructions handling; Doxygen comments; Documentation.
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redcode
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API reference
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=============
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Macros
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------
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Library version macros
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----------------------
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.. doxygendefine:: Z80_LIBRARY_VERSION_MAJOR
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.. doxygendefine:: Z80_LIBRARY_VERSION_MINOR
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.. doxygendefine:: Z80_LIBRARY_VERSION_MICRO
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.. doxygendefine:: Z80_LIBRARY_VERSION_STRING
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.. doxygendefine:: Z80_CYCLE_LIMIT
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.. doxygendefine:: Z80_HOOK
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.. doxygendefine:: Z80_MODEL_ZILOG_NMOS
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.. doxygendefine:: Z80_MODEL_ZILOG_CMOS
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.. doxygendefine:: Z80_REQUEST_SPECIAL_RESET
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.. doxygendefine:: Z80_REQUEST_RESET
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.. doxygendefine:: Z80_REQUEST_NMI
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.. doxygendefine:: Z80_REQUEST_INT
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.. doxygendefine:: Z80_RESUME_HALT
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.. doxygendefine:: Z80_RESUME_XY
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.. doxygendefine:: Z80_RESUME_IM0_XY
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Callback Types
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Callback types
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--------------
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.. doxygentypedef:: Z80Read
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.. doxygentypedef:: Z80Write
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.. doxygentypedef:: Z80HALT
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.. doxygentypedef:: Z80Notify
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.. doxygentypedef:: Z80Illegal
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.. doxygentypedef:: Z80Reset
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Objects
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-------
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Emulator object
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---------------
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.. doxygenstruct:: Z80
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:members:
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:members:
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Emulation options
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-----------------
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.. doxygendefine:: Z80_OPTION_HALT_SKIP
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.. doxygendefine:: Z80_OPTION_LD_A_IR_BUG
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.. doxygendefine:: Z80_OPTION_OUT_VC_255
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.. doxygendefine:: Z80_OPTION_XQ
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.. doxygendefine:: Z80_OPTION_YQ
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.. doxygendefine:: Z80_MODEL_ZILOG_NMOS
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.. doxygendefine:: Z80_MODEL_ZILOG_CMOS
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.. doxygendefine:: Z80_MODEL_NEC_NMOS
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.. doxygendefine:: Z80_MODEL_ST_CMOS
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Register accessors
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------------------
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.. doxygendefine:: Z80_MEMPTR
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.. doxygendefine:: Z80_PC
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.. doxygendefine:: Z80_SP
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.. doxygendefine:: Z80_XY
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.. doxygendefine:: Z80_IX
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.. doxygendefine:: Z80_IY
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.. doxygendefine:: Z80_AF
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.. doxygendefine:: Z80_BC
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.. doxygendefine:: Z80_DE
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.. doxygendefine:: Z80_HL
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.. doxygendefine:: Z80_AF_
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.. doxygendefine:: Z80_BC_
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.. doxygendefine:: Z80_DE_
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.. doxygendefine:: Z80_HL_
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.. doxygendefine:: Z80_MEMPTRH
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.. doxygendefine:: Z80_MEMPTRL
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.. doxygendefine:: Z80_PCH
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.. doxygendefine:: Z80_PCL
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.. doxygendefine:: Z80_SPH
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.. doxygendefine:: Z80_SPL
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.. doxygendefine:: Z80_XYH
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.. doxygendefine:: Z80_XYL
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.. doxygendefine:: Z80_IXH
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.. doxygendefine:: Z80_IXL
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.. doxygendefine:: Z80_IYH
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.. doxygendefine:: Z80_IYL
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.. doxygendefine:: Z80_A
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.. doxygendefine:: Z80_F
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.. doxygendefine:: Z80_B
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.. doxygendefine:: Z80_C
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.. doxygendefine:: Z80_D
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.. doxygendefine:: Z80_E
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.. doxygendefine:: Z80_H
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.. doxygendefine:: Z80_L
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.. doxygendefine:: Z80_A_
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.. doxygendefine:: Z80_F_
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.. doxygendefine:: Z80_B_
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.. doxygendefine:: Z80_C_
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.. doxygendefine:: Z80_D_
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.. doxygendefine:: Z80_E_
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.. doxygendefine:: Z80_H_
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.. doxygendefine:: Z80_L_
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Limits
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------
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.. doxygendefine:: Z80_CYCLE_LIMIT
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Hooking
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-------
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.. doxygendefine:: Z80_HOOK
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Functions
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---------
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.. doxygenfunction:: z80_in_offset
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.. doxygenfunction:: z80_in_cycle
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.. doxygenfunction:: z80_instant_reset
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.. doxygenfunction:: z80_out_offset
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.. doxygenfunction:: z80_out_cycle
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.. doxygenfunction:: z80_execute
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.. doxygenfunction:: z80_int
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.. doxygenfunction:: z80_nmi
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.. doxygenfunction:: z80_normal_reset
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.. doxygenfunction:: z80_power
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.. doxygenfunction:: z80_refresh_address
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.. doxygenfunction:: z80_reset
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.. doxygenfunction:: z80_run
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.. doxygenfunction:: z80_special_reset
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@@ -33,7 +33,7 @@ Changes:
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22. Fixed the clock cycles of the ``dec XY`` and ``in (c)`` instructions.
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23. Fixed the ``read_16`` function so that the order in which the compiler evaluates expressions does not affect the order of the memory read operations.
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24. Fixed the order in which the memory write operations are performed when the SP register is involved. This affects the NMI response, the INT response in modes 1 and 2, and the following instructions: ``ex (sp),{hl|XY}``, ``push TT``, ``push XY``, ``call WORD``, ``call Z,WORD`` and ``rst N``.
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25. Fixed the handling of illegal instructions to avoid stack overflows in long sequences of ``DDh`` / ``FDh`` prefixes.
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25. Fixed the handling of illegal instructions to avoid stack overflows in long sequences of ``DDh/FDh`` prefixes.
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26. Fixed several implicit conversions to avoid warnings about loss of sign and precision.
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27. Fixed some bitwise operations to avoid undefined behavior and arithmetic right shifts on signed integers.
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28. Fixed violations of the C standard in several identifiers.
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@@ -43,27 +43,28 @@ Changes:
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32. Replaced all ``ld {J,K|O,P}`` instructions that have the same destination and source register with NOPs.
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33. Reimplemented the HALT state. The emulation should now be fully accurate. HALTskip is also supported.
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34. Added optional emulation of the normal and special RESET signals, along with the new ``z80_reset`` and ``z80_special_reset`` functions to emit them. The old ``z80_reset`` function is now called ``z80_instant_reset``.
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35. Added emulation of the NMI acknowledge M-cycle through the new ``Z80::nmia`` callback.
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36. Added emulation of the INT acknowledge M-cycle through the new ``Z80::inta`` callback, which replaces ``Z80::int_data``.
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37. Added optional full emulation of the interrupt mode 0, along with the new ``Z80::int_fetch`` callback to perform bus read operations on instruction data. If not enabled at compile-time, the old simplified emulation is built, which supports only the most typical instructions.
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38. Added accurate flag behavior in the following instructions: ``ldir``, ``lddr``, ``cpir``, ``cpdr``, ``inir``, ``indr``, ``otir`` and ``otdr``.
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39. Added emulation of the interrupt acceptance deferral that occurs during the ``reti`` and ``retn`` instructions.
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40. Added MEMPTR emulation. The ``bit N,(hl)`` instruction now produces a correct value of F.
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41. Added optional emulation of the Q "register". If enabled at compile-time, the ``ccf`` and ``scf`` instructions produce a correct value of F.
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42. Added emulation options that can be configured at runtime.
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43. Added emulation of the ``out (c),255`` instruction (Zilog Z80 CMOS).
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44. Added optional emulation of the bug affecting the ``ld a,{i|r}`` instructions (Zilog Z80 NMOS). If enabled at compile-time, the P/V flag is reset when an INT is accepted during the execution of these instructions.
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45. Added the ``Z80::fetch_opcode`` and ``Z80::fetch`` callbacks to perform opcode fetch operations and memory read operations on instruction data respectively.
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46. Added hooking functionality through the ``ld h,h`` instruction and the new ``Z80::hook`` callback.
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47. Added the ``Z80::nop`` callback to perform disregarded opcode fetch operations during internal NOP M-cycles.
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48. Added four callbacks to notify the execution of important instructions: ``Z80::ld_i_a``, ``Z80::ld_r_a``, ``Z80::reti`` and ``Z80::retn``.
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49. Removed ``Z80::state``. Replaced with individual members for the registers, the interrupt enable flip-flops and the interrupt mode.
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50. Removed the superfluous EI flag. The previous opcode is checked instead, which is faster and makes the ``Z80`` object smaller.
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51. Removed all module-related stuff.
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52. Optimizations in flag computation and condition evaluation.
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53. New source code comments and improvements to existing ones.
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54. Improved code aesthetics.
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55. Other improvements, optimizations and minor changes.
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35. Added the ``Z80::fetch_opcode`` and ``Z80::fetch`` callbacks to perform opcode fetch operations and memory read operations on instruction data respectively.
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36. Added the ``Z80::nop callback`` to perform disregarded opcode fetch operations during internal NOP M-cycles.
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37. Added emulation of the NMI acknowledge M-cycle through the new ``Z80::nmia`` callback.
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38. Added emulation of the INT acknowledge M-cycle through the new ``Z80::inta`` callback, which replaces ``Z80::int_data``.
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39. Added optional full emulation of the interrupt mode 0, along with the new ``Z80::int_fetch`` callback to perform bus read operations on instruction data. If not enabled at compile-time, the old simplified emulation is built, which supports only the most typical instructions.
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40. Added four callbacks to notify the execution of important instructions: ``Z80::ld_i_a``, ``Z80::ld_r_a``, ``Z80::reti`` and ``Z80::retn``.
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41. Added hooking functionality through the ``ld h,h`` instruction and the new ``Z80::hook`` callback.
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42. Added the ``Z80::illegal`` callback to delegate the emulation of illegal instructions.
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43. Added accurate flag behavior in the following instructions: ``ldir``, ``lddr``, ``cpir``, ``cpdr``, ``inir``, ``indr``, ``otir`` and ``otdr``.
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44. Added emulation of the interrupt acceptance deferral that occurs during the ``reti`` and ``retn`` instructions.
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45. Added MEMPTR emulation. The ``bit N,(hl)`` instruction now produces a correct value of F.
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46. Added optional emulation of the Q "register". If enabled at compile-time, the ``ccf`` and ``scf`` instructions produce a correct value of F.
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47. Added emulation options that can be configured at runtime.
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48. Added emulation of the ``out (c),255`` instruction (Zilog Z80 CMOS).
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49. Added optional emulation of the bug affecting the ``ld a,{i|r}`` instructions (Zilog Z80 NMOS). If enabled at compile-time, the P/V flag is reset when an INT is accepted during the execution of these instructions.
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50. Removed ``Z80::state``. Replaced with individual members for the registers, the interrupt enable flip-flops and the interrupt mode.
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51. Removed the superfluous EI flag. The previous opcode is checked instead, which is faster and makes the ``Z80`` object smaller.
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52. Removed all module-related stuff.
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53. Optimizations in flag computation and condition evaluation.
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54. New source code comments and improvements to existing ones.
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55. Improved code aesthetics.
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56. Other improvements, optimizations and minor changes.
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v0.1 (2018-11-10)
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=================
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