Illegal instructions handling; Doxygen comments; Documentation.
This commit is contained in:
611
API/Z80.h
611
API/Z80.h
@@ -28,8 +28,7 @@
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*
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* @details The Z80 library implements a fast, small and accurate emulator
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* of the Zilog Z80. It emulates all that is known to date about this CPU,
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* including the undocumented flags and instructions, MEMPTR, Q, and the
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* special RESET.
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* including the undocumented behaviour, MEMPTR, Q and the special RESET.
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*
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* @version 0.2
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* @date 2022-05-29
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@@ -52,72 +51,89 @@
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# endif
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#endif
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/** @brief The major version number of the Z80 library. */
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/** @brief Major version number of the Z80 library. */
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#define Z80_LIBRARY_VERSION_MAJOR 0
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/** @brief The minor version number of the Z80 library. */
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/** @brief Minor version number of the Z80 library. */
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#define Z80_LIBRARY_VERSION_MINOR 2
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/** @brief The micro version number of the Z80 library. */
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/** @brief Micro version number of the Z80 library. */
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#define Z80_LIBRARY_VERSION_MICRO 0
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/** @brief A string literal with the version number of the Z80 library. */
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/** @brief String literal with the version number of the Z80 library. */
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#define Z80_LIBRARY_VERSION_STRING "0.2"
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/** @brief The maximum number of clock cycles that the @ref z80_run and @ref
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/** @brief Maximum number of clock cycles that the @ref z80_run and @ref
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* z80_execute functions can emulate per call. */
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#define Z80_CYCLE_LIMIT (Z_USIZE_MAXIMUM - Z_USIZE(30))
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#define Z80_CYCLES_PER_RESET 5
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/** @brief The 8-bit value interpreted as a hook by the Z80 emulator, which
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* corresponds to the <tt>ld h,h</tt> opcode in the Z80 ISA. */
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/** @brief Opcode interpreted as a hook by the Z80 emulator, which
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* corresponds to the <tt>ld h,h</tt> instruction of the Z80 ISA. */
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#define Z80_HOOK Z_UINT8(0x64)
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/** @brief Defines a pointer to a callback function used by the Z80 emulator
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* to read a byte.
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to perform
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* a read operation.
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*
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* @param context The value of the @ref Z80.context member variable of the
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* object invoking the callback.
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* @param context The value of the @ref Z80.context member of the calling
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* object.
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* @param address The memory address or I/O port to read from.
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* @return The byte read. */
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typedef zuint8 (* Z80Read)(void *context, zuint16 address);
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/** @brief Defines a pointer to a callback function used by the Z80 emulator
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* to write a byte.
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to perform
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* a write operation.
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*
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* @param context The value of the @ref Z80.context member variable of the
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* object invoking the callback.
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* @param context The value of the @ref Z80.context member of the calling
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* object.
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* @param address The memory address or I/O port to write to.
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* @param value The byte to write. */
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typedef void (* Z80Write)(void *context, zuint16 address, zuint8 value);
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/** @brief Defines a pointer to a callback function used by the Z80 emulator
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* to notify the change of state of the HALT line.
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to notify
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* a signal change on the HALT line.
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*
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* @param context The value of the @ref Z80.context member variable of the
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* object invoking the callback.
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* @param context The value of the @ref Z80.context member of the calling
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* object.
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* @param state
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* @c TRUE if the HALT line goes low (the CPU enters the HALT state);
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* @c FALSE if the HALT line goes high (the CPU exits the HALT state). */
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typedef void (* Z80HALT)(void *context, zboolean state);
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/** @brief Defines a pointer to a callback function used by the Z80 emulator
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* to notify an event.
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to notify
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* an event.
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*
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* @param context The value of the @ref Z80.context member variable of the
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* object invoking the callback. */
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* @param context The value of the @ref Z80.context member of the calling
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* object. */
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typedef void (* Z80Notify)(void *context);
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to delegate
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* the emulation of an illegal instruction.
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*
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* @param context The value of the @ref Z80.context member variable of the
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* calling object.
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* @param opcode The illegal opcode.
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* @return The number of clock cycles consumed by the instruction. */
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typedef zuint8 (* Z80Illegal)(void *context, zuint8 opcode);
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/** @brief Defines a pointer to a @ref Z80 callback function invoked to obtain
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* the duration of a RESET signal.
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*
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* @param context The value of the @ref Z80.context member of the calling
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* object.
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* @param address The value in the address bus when the RESET signal begins.
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* @return The number of clock cycles that the RESET signal lasts. */
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typedef zusize (* Z80Reset)(void *context, zuint16 address);
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@@ -125,280 +141,183 @@ typedef zusize (* Z80Reset)(void *context, zuint16 address);
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*
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* @brief A Z80 CPU emulator.
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*
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* @details @c Z80 contains the state of an emulated Z80 CPU
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* and the callback pointers needed to interconnect it with the external logic.
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* Before using an object of this type, some of its members
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* must be initialized. In particular the following (in alphabetical order):
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* @ref Z80.context, @ref Z80.fetch, @ref Z80.fetch_opcode, @ref Z80.halt_nop,
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* @ref Z80.in, @ref Z80.out, @ref Z80.read, @ref Z80.write, @ref Z80.read_bus,
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* @ref Z80.halt, @ref Z80.inta, @ref Z80.reti @ref Z80.hook and @ref
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* Z80.options.
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*
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* Callback | Mandatory
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* --------------------- | ---------
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* @ref Z80.fetch_opcode | yes
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* @ref Z80.fetch | yes
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* @ref Z80.read | yes
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* @ref Z80.write | yes
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* @ref Z80.in | yes
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* @ref Z80.out | yes
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* @ref Z80.halt | no
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* @ref Z80.halt_nop | no
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* @ref Z80.nmia | yes
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* @ref Z80.inta | yes
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* @ref Z80.int_fetch | no
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* @ref Z80.ld_i_a | no
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* @ref Z80.ld_r_a | no
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* @ref Z80.reti | no
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* @ref Z80.retn | no
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* @ref Z80.hook | no
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*/
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* @details @c Z80 contains the state of an emulated Z80 CPU and the callback
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* pointers needed to interconnect it with the external logic. */
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typedef struct {
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/** @brief Clock cycle counter.
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*
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* This clock cycle counter is updated as the emulator executes
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* instructions and responds to different signals. */
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/** @brief Number of clock cycles executed. */
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zusize cycles;
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/** @brief Maximum number of clock cycles to be executed in the current
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* invokation of @ref z80_run. */
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/** @brief Maximum number of clock cycles to be executed. */
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zusize cycle_limit;
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/** @brief Pointer passed as the first argument to the callbacks.
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/** @brief Pointer to pass as first argument to callbacks.
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*
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* @details This member variable can be used to maintain a reference to
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* the object or context to which the Z80 emulator object belongs. */
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* @details This member is intended to maintain a reference to the
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* context to which the object belongs. */
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void *context;
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/** @brief Callback used to perform opcode fetch operations.
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*
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* @details This type of operation is used by the CPU to read the first
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* byte of an instruction or an instruction prefix. A succession of
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* @c DDh and/or @c FDh prefixes will cause multiple consecutive such
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* operations until an opcode is fetched. In the instructions with
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* double prefix (@c CBDDh or @c CBFDh), only the prefixes are fetched
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* with this operation, the remaining 2 bytes are accessed by using
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* normal memory read operations.
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*
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* The emulator always incrementents the R register @b before calling
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* this callback, but the value of its most-significant bit (R7) is not
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* preserved for speed optimization reasons. In the rare case that the
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* callback function needs to access that register, it must take R7
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* from the 7th bit of the @c r7 member variable.
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*
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* Implementations that do not distinguish between opcode fetch and
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* memory read operations should use the same callback function for
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* both.
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/** @brief Callback invoked to perform an opcode fetch.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Read fetch_opcode;
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/** @brief Callback used to perform memory read operations on instruction data.
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/** @brief Callback invoked to perform a memory read on instruction
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* data.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Read fetch;
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/** @brief Callback used to perform a memory read operation.
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*
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* @details This type of operation is used by the CPU to read a byte
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* from a memory address.
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/** @brief Callback invoked to perform a memory read.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Read read;
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/** @brief Callback used to perform a memory write operation.
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*
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* @details This type of operation is used by the CPU to write a byte
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* to a memory address.
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/** @brief Callback invoked to peform a memory write.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Write write;
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/** @brief Callback used to perform an I/O read operation.
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*
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* @details This type of operation is used by the CPU to read a byte
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* from an I/O port.
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/** @brief Callback invoked to perform an I/O read.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Read in;
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/** @brief Callback used to perform an I/O write operation.
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*
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* @details This type of operation is used by the CPU to write a byte
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* to an I/O port.
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/** @brief Callback invoked to perform an I/O write.
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*
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* @attention This callback is mandatory, initializing it to @c Z_NULL
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* will cause the emulator to crash. */
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Z80Write out;
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/** @brief Callback used to notify that the state of the HALT output
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* line has changed.
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/** @brief Callback invoked when the state of the HALT line changes.
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*
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* @details The @c HALT instruction halts the CPU by not incrementing
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* the PC register, so the instruction is re-executed until an
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* interrupt is accepted. Only then the PC register is incremented
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* again and the next instruction is executed. The HALT output line is
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* active (low) during the HALT state.
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*
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* The emulator invokes this callback after changing the value of the
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* @c halt_line member variable and, when exiting the HALT state,
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* immediately before executing the interrupt response.
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*
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* @attention This callback is optional and @b must be initialized to
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80HALT halt;
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/** @brief Callback invoked... */
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/** @brief Callback invoked to perform the disregarded opcode fetch of
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* an internal NOP operation.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Read nop;
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/** @brief Callback invoked... */
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/** @brief Callback invoked to perform the disregarded opcode fetch of
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* a non-maskable interrupt acknowledge.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Read nmia;
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/** @brief Callback used to notify a maskable interrupt acknowledge
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* (INTA).
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/** @brief Callback invoked to perform the data bus read of a maskable
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* interrupt acknowledge.
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*
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* @details When a maskable interrupt (INT) is accepted, the CPU
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* generates a special M1 cycle to indicate that the interrupting I/O
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* device can write to the data bus. Two wait clock cycles are added
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* to this M1 cycle, allowing sufficient time to identify which device
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* must insert the data.
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*
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* The emulator invokes this callback during the execution of the INT
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* response. It should be used to identify and prepare the context of
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* the interrupting device, so that subsequent invocations of the @c
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* read_bus callback can read the interrupt response vector or the
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* instruction to be executed.
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*
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* @note This callback is optional and @b must be initialized to @c
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* Z_NULL if not used.
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* @details When a maskable interrupt (INT) is accepted, the CPU reads
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* the interrupt response data provided by the interrupting device via
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* the data bus. Usually only one data bus read operation is performed
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* during the INT acknowledge cycle, but when the CPU responds to the
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* interrupt in mode 0, it will perform as many such operations as
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* needed to read the byte sequence of the instruction to be executed.
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*
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* The emulator invokes this callback during the execution of the INT
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* response. The return value is ignored in interrupt mode 1. In mode
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* 0, the emulator invokes this callback as many times as needed to
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* read a complete instruction. Illegal instructions and instruction
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* prefix sequences are fully supported.
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*
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* @attention This callback is optional and @b must be initialized to
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* @c Z_NULL if not used, in which case the emulator will assume that
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* the byte read from the data bus is always @c FFh. */
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Read inta;
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/** @brief Callback used to perform a data bus read operation during a
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* maskable interrupt (INT) response.
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**/
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/** @brief Callback invoked to perform a memory read on instruction data
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* during a maskable interrupt response in mode 0.
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*
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* @attention This callback becomes mandatory when the @c Z80.inta
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* callback is used. Initializing it to @c Z_NULL will cause the
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* emulator to crash. */
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Z80Read int_fetch;
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/* @brief Callback invoked to query the duration of a reset signal.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Reset reset;
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/** @brief Callback invoked before executing the <tt>ld i,a</tt>
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* instruction. */
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/** @brief Callback invoked when an <tt>ld i,a</tt> instruction is
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* fetched.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Notify ld_i_a;
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/** @brief Callback invoked before executing the <tt>ld r,a</tt>
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* instruction.
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/** @brief Callback invoked when an <tt>ld r,a</tt> instruction is
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* fetched.
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*
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* @attention This callback is optional and @b must be initialized to
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Notify ld_r_a;
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/** @brief Callback invoked before executing the @c reti instruction.
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/** @brief Callback invoked when a @c reti instruction is fetched.
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*
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* The Z80 Counter/Timer Circuit (CTC) detects the two-byte @c reti
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* opcode when it is fetched by the CPU. This instruction is used to
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* return from an ISR and signal that the computer should initialize
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* the daisy-chain enable lines for control of nested priority
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* interrupt handling.
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*
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* Although the Z80 CTC is not part of the CPU, the emulator can signal
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* the execution of a @c reti instruction by invoking this callback in
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* order to simplify the emulation of machines that use daisy-chain
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* interrupt servicing, thus avoiding having to implement the detection
|
||||
* of this instruction externally, which is not optimal and would cause
|
||||
* a speed penalty.
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*
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||||
* @attention This callback is optional and @b must be initialized to
|
||||
* @attention This callback is optional and must be initialized to
|
||||
* @c Z_NULL if not used. */
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Z80Notify reti;
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/** @brief Callback invoked before executing the @c retn instruction.
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* @attention This callback is optional and @b must be initialized to
|
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/** @brief Callback invoked when a @c retn instruction is fetched.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Notify retn;
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/** @brief Callback invoked...
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/** @brief Callback invoked when a trap is fecthed.
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*
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* @attention This callback is optional and @b must be initialized to
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Read hook;
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/** @brief Callback invoked to delegate the emulation of an illegal
|
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* opcode.
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*
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* @attention This callback is optional and must be initialized to
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* @c Z_NULL if not used. */
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Z80Illegal illegal;
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/** @brief Temporary storage used for instruction fetch. */
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ZInt32 data;
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/** @brief Temporay IX/IY register. */
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ZInt16 xy; /**< @brief Temporay IX/IY register. */
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ZInt16 memptr; /**< @brief MEMPTR register. */
|
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ZInt16 pc; /**< @brief PC register. */
|
||||
ZInt16 sp; /**< @brief SP register. */
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ZInt16 ix; /**< @brief IX register. */
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||||
ZInt16 iy; /**< @brief IY register. */
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||||
ZInt16 af; /**< @brief AF register. */
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ZInt16 bc; /**< @brief BC register. */
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||||
ZInt16 de; /**< @brief DE register. */
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||||
ZInt16 hl; /**< @brief HL register. */
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||||
ZInt16 af_; /**< @brief AF' register. */
|
||||
ZInt16 bc_; /**< @brief BC' register. */
|
||||
ZInt16 de_; /**< @brief DE' register. */
|
||||
ZInt16 hl_; /**< @brief HL' register. */
|
||||
zuint8 r; /**< @brief R register. */
|
||||
zuint8 i; /**< @brief I register. */
|
||||
|
||||
ZInt16 xy;
|
||||
|
||||
ZInt16 memptr; /**< @brief MEMPTR register. */
|
||||
ZInt16 pc; /**< @brief PC register. */
|
||||
ZInt16 sp; /**< @brief SP register. */
|
||||
ZInt16 ix; /**< @brief IX register. */
|
||||
ZInt16 iy; /**< @brief IY register. */
|
||||
ZInt16 af; /**< @brief AF register. */
|
||||
ZInt16 bc; /**< @brief BC register. */
|
||||
ZInt16 de; /**< @brief DE register. */
|
||||
ZInt16 hl; /**< @brief HL register. */
|
||||
ZInt16 af_; /**< @brief AF' register. */
|
||||
ZInt16 bc_; /**< @brief BC' register. */
|
||||
ZInt16 de_; /**< @brief DE' register. */
|
||||
ZInt16 hl_; /**< @brief HL' register. */
|
||||
zuint8 r; /**< @brief R register. */
|
||||
zuint8 i; /**< @brief I register. */
|
||||
|
||||
/** @brief The most significant bit of the R register (R7).
|
||||
*
|
||||
* @details The R register is incremented during each M1 cycle, but its
|
||||
* most significant bit (R7) is not affected. For optimization reasons,
|
||||
* this behavior is not emulated in every M1 cycle, so successive
|
||||
* increments of R corrupt R7. @c z80_run keeps the value of R7 in this
|
||||
* temporary member variable while executing operations and copies it
|
||||
* back to R before returning. Since this variable is a snapshot of the
|
||||
* R register at a given time, the value of the 7 least significant
|
||||
* bits must be considered garbage. */
|
||||
/** @brief The most significant bit of the R register. */
|
||||
|
||||
zuint8 r7;
|
||||
|
||||
@@ -409,21 +328,19 @@ typedef struct {
|
||||
|
||||
zuint8 im;
|
||||
|
||||
/** @brief Number of signals pending to be processed. */
|
||||
/** @brief Requests pending to be responded. */
|
||||
|
||||
zuint8 request;
|
||||
|
||||
/** @brief TODO */
|
||||
/** @brief Type of unfinished operation to be resumed. */
|
||||
|
||||
zuint8 resume;
|
||||
|
||||
zuint8 iff1; /**< @brief Interrupt flip-flop 1 (IFF1). */
|
||||
zuint8 iff2; /**< @brief Interrupt flip-flop 2 (IFF2). */
|
||||
zuint8 q; /**< @brief Q register. */
|
||||
zuint8 iff1; /**< @brief Interrupt enable flip-flop 1 (IFF1). */
|
||||
zuint8 iff2; /**< @brief Interrupt enable flip-flop 2 (IFF2). */
|
||||
zuint8 q; /**< @brief Q register. */
|
||||
|
||||
/** @brief CPU model.
|
||||
*
|
||||
* @details todo... */
|
||||
/** @brief Emulation options. */
|
||||
|
||||
zuint8 options;
|
||||
|
||||
@@ -443,49 +360,6 @@ typedef struct {
|
||||
zuint8 halt_line;
|
||||
} Z80;
|
||||
|
||||
#define Z80_MEMPTR(self) (self).memptr.uint16_value
|
||||
#define Z80_MEMPTRH(self) (self).memptr.uint8_values.at_1
|
||||
#define Z80_MEMPTRL(self) (self).memptr.uint8_values.at_0
|
||||
#define Z80_PC(self) (self).pc.uint16_value
|
||||
#define Z80_SP(self) (self).sp.uint16_value
|
||||
#define Z80_XY(self) (self).xy.uint16_value
|
||||
#define Z80_IX(self) (self).ix.uint16_value
|
||||
#define Z80_IY(self) (self).iy.uint16_value
|
||||
#define Z80_AF(self) (self).af.uint16_value
|
||||
#define Z80_BC(self) (self).bc.uint16_value
|
||||
#define Z80_DE(self) (self).de.uint16_value
|
||||
#define Z80_HL(self) (self).hl.uint16_value
|
||||
#define Z80_AF_(self) (self).af_.uint16_value
|
||||
#define Z80_BC_(self) (self).bc_.uint16_value
|
||||
#define Z80_DE_(self) (self).de_.uint16_value
|
||||
#define Z80_HL_(self) (self).hl_.uint16_value
|
||||
#define Z80_PCH(self) (self).pc.uint8_values.at_1
|
||||
#define Z80_PCL(self) (self).pc.uint8_values.at_0
|
||||
#define Z80_SPH(self) (self).sp.uint8_values.at_1
|
||||
#define Z80_SPL(self) (self).sp.uint8_values.at_0
|
||||
#define Z80_XYH(self) (self).xy.uint8_values.at_1
|
||||
#define Z80_XYL(self) (self).xy.uint8_values.at_0
|
||||
#define Z80_IXH(self) (self).ix.uint8_values.at_1
|
||||
#define Z80_IXL(self) (self).ix.uint8_values.at_0
|
||||
#define Z80_IYH(self) (self).iy.uint8_values.at_1
|
||||
#define Z80_IYL(self) (self).iy.uint8_values.at_0
|
||||
#define Z80_A(self) (self).af.uint8_values.at_1
|
||||
#define Z80_F(self) (self).af.uint8_values.at_0
|
||||
#define Z80_B(self) (self).bc.uint8_values.at_1
|
||||
#define Z80_C(self) (self).bc.uint8_values.at_0
|
||||
#define Z80_D(self) (self).de.uint8_values.at_1
|
||||
#define Z80_E(self) (self).de.uint8_values.at_0
|
||||
#define Z80_H(self) (self).hl.uint8_values.at_1
|
||||
#define Z80_L(self) (self).hl.uint8_values.at_0
|
||||
#define Z80_A_(self) (self).af_.uint8_values.at_1
|
||||
#define Z80_F_(self) (self).af_.uint8_values.at_0
|
||||
#define Z80_B_(self) (self).bc_.uint8_values.at_1
|
||||
#define Z80_C_(self) (self).bc_.uint8_values.at_0
|
||||
#define Z80_D_(self) (self).de_.uint8_values.at_1
|
||||
#define Z80_E_(self) (self).de_.uint8_values.at_0
|
||||
#define Z80_H_(self) (self).hl_.uint8_values.at_1
|
||||
#define Z80_L_(self) (self).hl_.uint8_values.at_0
|
||||
|
||||
#define Z80_SF 128
|
||||
#define Z80_ZF 64
|
||||
#define Z80_YF 32
|
||||
@@ -495,29 +369,55 @@ typedef struct {
|
||||
#define Z80_NF 2
|
||||
#define Z80_CF 1
|
||||
|
||||
#define Z80_OPTION_LD_A_IR_BUG 1
|
||||
#define Z80_OPTION_OUT_VC_255 2
|
||||
#define Z80_OPTION_XQ 8
|
||||
#define Z80_OPTION_HALT_SKIP 16
|
||||
#define Z80_OPTION_YQ 32
|
||||
/** @brief @ref Z80 option that enables the HALTskip optimization. */
|
||||
|
||||
#define Z80_OPTION_HALT_SKIP 16
|
||||
|
||||
/** @brief @ref Z80 option that enables emulation of the bug affecting the Zilog
|
||||
* Z80 NMOS, which causes the P/V flag to be reset when a maskable interrupt is
|
||||
* accepted during the execution of the <tt>ld a,{i|r}</tt> instructions. */
|
||||
|
||||
#define Z80_OPTION_LD_A_IR_BUG 1
|
||||
|
||||
/** @brief @ref Z80 option that enables emulation of the <tt>out (c),255</tt>
|
||||
* instruction, specific to the Zilog Z80 CMOS. */
|
||||
|
||||
#define Z80_OPTION_OUT_VC_255 2
|
||||
|
||||
/** @brief @ref Z80 option that enables the XQ factor in the emulation of the
|
||||
* <tt>ccf/scf</tt> instructions. */
|
||||
|
||||
#define Z80_OPTION_XQ 8
|
||||
|
||||
/** @brief @ref Z80 option that enables the YQ factor in the emulation of the
|
||||
* <tt>ccf/scf</tt> instructions. */
|
||||
|
||||
#define Z80_OPTION_YQ 32
|
||||
|
||||
/** @brief @ref Z80 option that enables all the options required to fully
|
||||
* emulate a Zilog NMOS CPU. */
|
||||
|
||||
/** @brief Zilog Z80 NMOS emulation. */
|
||||
#define Z80_MODEL_ZILOG_NMOS \
|
||||
(Z80_OPTION_LD_A_IR_BUG | Z80_OPTION_XQ | Z80_OPTION_YQ)
|
||||
|
||||
/** @brief Zilog Z80 CMOS emulation. */
|
||||
/** @brief @ref Z80 option that enables all the options required to fully
|
||||
* emulate a Zilog CMOS CPU. */
|
||||
|
||||
#define Z80_MODEL_ZILOG_CMOS \
|
||||
(Z80_OPTION_OUT_VC_255 | Z80_OPTION_XQ | Z80_OPTION_YQ)
|
||||
|
||||
/** @brief NEC NMOS emulation. */
|
||||
/** @brief @ref Z80 option that enables all the options required to fully
|
||||
* emulate a NEC NMOS CPU. */
|
||||
|
||||
#define Z80_MODEL_NEC_NMOS \
|
||||
Z80_OPTION_LD_A_IR_BUG
|
||||
|
||||
/** @brief SGS-Thomson NMOS emulation. */
|
||||
/** @brief @ref Z80 option that enables all the options required to fully
|
||||
* emulate a SGS-Thomson CMOS CPU. */
|
||||
|
||||
#define Z80_MODEL_ST_CMOS \
|
||||
(Z80_OPTION_LD_A_IR_BUG | Z80_OPTION_YQ)
|
||||
|
||||
|
||||
#define Z80_REQUEST_RESET 3
|
||||
#define Z80_REQUEST_REJECT_NMI 4
|
||||
#define Z80_REQUEST_NMI 8 /**< NMI pending. */
|
||||
@@ -537,9 +437,180 @@ typedef struct {
|
||||
#define Z80_RESUME_SPECIAL_RESET_XY 5
|
||||
#define Z80_RESUME_SPECIAL_RESET_NOP 6
|
||||
|
||||
|
||||
/** @brief Accesses the MEMPTR register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_MEMPTR(object) (object).memptr.uint16_value
|
||||
|
||||
/** @brief Accesses the PC register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_PC(object) (object).pc.uint16_value
|
||||
|
||||
/** @brief Accesses the SP register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_SP(object) (object).sp.uint16_value
|
||||
|
||||
/** @brief Accesses the temporary IX/IY register of a @ref Z80 @c object */
|
||||
|
||||
#define Z80_XY(object) (object).xy.uint16_value
|
||||
|
||||
/** @brief Accesses the IX register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IX(object) (object).ix.uint16_value
|
||||
|
||||
/** @brief Accesses the IY register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IY(object) (object).iy.uint16_value
|
||||
|
||||
/** @brief Accesses the AF register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_AF(object) (object).af.uint16_value
|
||||
|
||||
/** @brief Accesses the BC register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_BC(object) (object).bc.uint16_value
|
||||
|
||||
/** @brief Accesses the DE register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_DE(object) (object).de.uint16_value
|
||||
|
||||
/** @brief Accesses the HL register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_HL(object) (object).hl.uint16_value
|
||||
|
||||
/** @brief Accesses the AF' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_AF_(object) (object).af_.uint16_value
|
||||
|
||||
/** @brief Accesses the BC' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_BC_(object) (object).bc_.uint16_value
|
||||
|
||||
/** @brief Accesses the DE' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_DE_(object) (object).de_.uint16_value
|
||||
|
||||
/** @brief Accesses the HL' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_HL_(object) (object).hl_.uint16_value
|
||||
|
||||
/** @brief Accesses the high byte of the MEMPTR register of a @ref Z80
|
||||
* @c object. */
|
||||
|
||||
#define Z80_MEMPTRH(object) (object).memptr.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the low byte of the MEMPTR register of a @ref Z80
|
||||
* @c object. */
|
||||
|
||||
#define Z80_MEMPTRL(object) (object).memptr.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the high byte of the PC register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_PCH(object) (object).pc.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the low byte of the PC register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_PCL(object) (object).pc.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the high byte of the SP register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_SPH(object) (object).sp.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the low byte of the SP register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_SPL(object) (object).sp.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the temporary IXH/IYH register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_XYH(object) (object).xy.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the temporary IXL/IYL register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_XYL(object) (object).xy.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the IXH register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IXH(object) (object).ix.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the IXL register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IXL(object) (object).ix.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the IYH register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IYH(object) (object).iy.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the IYL register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_IYL(object) (object).iy.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the A register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_A(object) (object).af.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the F register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_F(object) (object).af.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the B register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_B(object) (object).bc.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the C register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_C(object) (object).bc.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the D register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_D(object) (object).de.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the E register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_E(object) (object).de.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the H register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_H(object) (object).hl.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the L register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_L(object) (object).hl.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the A' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_A_(object) (object).af_.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the F' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_F_(object) (object).af_.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the B' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_B_(object) (object).bc_.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the C' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_C_(object) (object).bc_.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the D' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_D_(object) (object).de_.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the E' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_E_(object) (object).de_.uint8_values.at_0
|
||||
|
||||
/** @brief Accesses the H' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_H_(object) (object).hl_.uint8_values.at_1
|
||||
|
||||
/** @brief Accesses the L' register of a @ref Z80 @c object. */
|
||||
|
||||
#define Z80_L_(object) (object).hl_.uint8_values.at_0
|
||||
|
||||
Z_EXTERN_C_BEGIN
|
||||
|
||||
/** @brief Sets the power state of a Z80 emulator.
|
||||
/** @brief Sets the power state of a @ref Z80 object.
|
||||
*
|
||||
* @param self Pointer to the object on which the function is called.
|
||||
* @param state
|
||||
@@ -554,7 +625,7 @@ Z80_API void z80_power(Z80 *self, zboolean state);
|
||||
|
||||
Z80_API void z80_instant_reset(Z80 *self);
|
||||
|
||||
/** @brief Sends a normal RESET signal to a Z80 emulator.
|
||||
/** @brief Sends a normal RESET signal to a @ref Z80 object.
|
||||
*
|
||||
* @details todo
|
||||
*
|
||||
@@ -574,16 +645,16 @@ Z80_API void z80_reset(Z80 *self);
|
||||
|
||||
Z80_API void z80_special_reset(Z80 *self);
|
||||
|
||||
/** @brief Sets the state of the INT line of a Z80 emulator.
|
||||
/** @brief Sets the state of the INT line of a @ref Z80 object.
|
||||
*
|
||||
* @param self Pointer to the object on which the function is called.
|
||||
* @param state
|
||||
* @c TRUE = ON (line low);
|
||||
* @c FALSE = OFF (line high). */
|
||||
* @c TRUE = set line low;
|
||||
* @c FALSE = set line high. */
|
||||
|
||||
Z80_API void z80_int(Z80 *self, zboolean state);
|
||||
|
||||
/** @brief Sends a NMI signal to a Z80 emulator.
|
||||
/** @brief Triggers the NMI line of a @ref Z80 object.
|
||||
*
|
||||
* @param self Pointer to the object on which the function is called. */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user