317 lines
28 KiB
NASM
317 lines
28 KiB
NASM
;--------------------------------------------------------------------------------------------------------
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;-
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;- Name: TESTTZ_Definitions.asm
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;- Created: June 2020
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;- Author(s): Philip Smart
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;- Description: tranZPUter tester program
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;- A small program to exercise parts of the tranZPUter to aid in problem resolution.
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;-
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;- Credits:
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;- Copyright: (c) 2019-20 Philip Smart <philip.smart@net2net.org>
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;-
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;- History: Jun 2020 - Initial version.
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;-
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;--------------------------------------------------------------------------------------------------------
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;- This source file is free software: you can redistribute it and-or modify
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;- it under the terms of the GNU General Public License as published
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;- by the Free Software Foundation, either version 3 of the License, or
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;- (at your option) any later version.
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;-
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;- This source file is distributed in the hope that it will be useful,
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;- but WITHOUT ANY WARRANTY; without even the implied warranty of
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;- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;- GNU General Public License for more details.
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;-
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;- You should have received a copy of the GNU General Public License
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;- along with this program. If not, see <http://www.gnu.org/licenses/>.
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;--------------------------------------------------------------------------------------------------------
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;-----------------------------------------------
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; Features.
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;-----------------------------------------------
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;-----------------------------------------------
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; Configurable settings.
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;-----------------------------------------------
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COLW: EQU 80 ; Width of the display screen (ie. columns).
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ROW: EQU 25 ; Number of rows on display screen.
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SCRNSZ: EQU COLW * ROW ; Total size, in bytes, of the screen display area.
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SCRLW: EQU COLW / 8 ; Number of 8 byte regions in a line for hardware scroll.
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MODE80C: EQU 1
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; Debugging
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ENADEBUG EQU 0 ; Enable debugging logic, 1 = enable, 0 = disable
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;-----------------------------------------------
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; Memory mapped ports in hardware.
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;-----------------------------------------------
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SCRN: EQU 0D000H
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ARAM: EQU 0D800H
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DSPCTL: EQU 0DFFFH ; Screen 40/80 select register (bit 7)
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KEYPA: EQU 0E000h
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KEYPB: EQU 0E001h
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KEYPC: EQU 0E002h
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KEYPF: EQU 0E003h
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CSTR: EQU 0E002h
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CSTPT: EQU 0E003h
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CONT0: EQU 0E004h
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CONT1: EQU 0E005h
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CONT2: EQU 0E006h
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CONTF: EQU 0E007h
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SUNDG: EQU 0E008h
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TEMP: EQU 0E008h
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MEMSW: EQU 0E00CH
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MEMSWR: EQU 0E010H
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INVDSP: EQU 0E014H
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NRMDSP: EQU 0E015H
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SCLDSP: EQU 0E200H
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SCLBASE: EQU 0E2H
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;-----------------------------------------------
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; Common character definitions.
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;-----------------------------------------------
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SCROLL EQU 001H ;Set scroll direction UP.
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BELL EQU 007H
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SPACE EQU 020H
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TAB EQU 009H ;TAB ACROSS (8 SPACES FOR SD-BOARD)
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CR EQU 00DH
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LF EQU 00AH
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FF EQU 00CH
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DELETE EQU 07FH
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BACKS EQU 008H
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SOH EQU 1 ; For XModem etc.
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EOT EQU 4
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ACK EQU 6
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NAK EQU 015H
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NUL EQU 000H
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NULL EQU 000H
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CTRL_A EQU 001H
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CTRL_B EQU 002H
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CTRL_C EQU 003H
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CTRL_D EQU 004H
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CTRL_E EQU 005H
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CTRL_F EQU 006H
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CTRL_G EQU 007H
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CTRL_H EQU 008H
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CTRL_I EQU 009H
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CTRL_J EQU 00AH
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CTRL_K EQU 00BH
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CTRL_L EQU 00CH
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CTRL_M EQU 00DH
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CTRL_N EQU 00EH
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CTRL_O EQU 00FH
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CTRL_P EQU 010H
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CTRL_Q EQU 011H
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CTRL_R EQU 012H
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CTRL_S EQU 013H
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CTRL_T EQU 014H
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CTRL_U EQU 015H
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CTRL_V EQU 016H
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CTRL_W EQU 017H
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CTRL_X EQU 018H
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CTRL_Y EQU 019H
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CTRL_Z EQU 01AH
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ESC EQU 01BH
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CTRL_SLASH EQU 01CH
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CTRL_RB EQU 01DH
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CTRL_CAPPA EQU 01EH
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CTRL_UNDSCR EQU 01FH
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CTRL_AT EQU 000H
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NOKEY EQU 0F0H
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CURSRIGHT EQU 0F1H
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CURSLEFT EQU 0F2H
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CURSUP EQU 0F3H
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CURSDOWN EQU 0F4H
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DBLZERO EQU 0F5H
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INSERT EQU 0F6H
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CLRKEY EQU 0F7H
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HOMEKEY EQU 0F8H
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BREAKKEY EQU 0FBH
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;-----------------------------------------------
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; IO ports in hardware and values.
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;-----------------------------------------------
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MMCFG EQU 060H ; Memory management configuration latch.
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SETXMHZ EQU 062H ; Select the alternate clock frequency.
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SET2MHZ EQU 064H ; Select the system 2MHz clock frequency.
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CLKSELRD EQU 066H ; Read clock selected setting, 0 = 2MHz, 1 = XMHz
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SVCREQ EQU 068H ; I/O Processor service request.
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CPLDSTATUS EQU 06BH ; Version 2.1 CPLD status register.
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CPUCFG EQU 06CH ; Version 2.2 CPU configuration register.
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CPUSTATUS EQU 06CH ; Version 2.2 CPU runtime status register.
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CPUINFO EQU 06DH ; Version 2.2 CPU information register.
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CPLDCFG EQU 06EH ; Version 2.1 CPLD configuration register.
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CPLDINFO EQU 06FH ; Version 2.1 CPLD version information register.
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VMPNUM EQU 0A0H ; Set the parameter number to update.
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VMPLBYTE EQU 0A1H ; Update the lower selected parameter byte.
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VMPUBYTE EQU 0A2H ; Update the upper selected parameter byte.
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PALSLCTOFF EQU 0A3H ; set the palette slot Off position to be adjusted.
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PALSLCTON EQU 0A4H ; set the palette slot On position to be adjusted.
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PALSETRED EQU 0A5H ; set the red palette value according to the PALETTE_PARAM_SEL address.
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PALSETGREEN EQU 0A6H ; set the green palette value according to the PALETTE_PARAM_SEL address.
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PALSETBLUE EQU 0A7H ; set the blue palette value according to the PALETTE_PARAM_SEL address.
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VMPALETTE EQU 0B0H ; Select Palette:
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; 0xB0 sets the palette. The Video Module supports 4 bit per colour output but there is only enough RAM for 1 bit per colour so the pallette is used to change the colours output.
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; Bits [7:0] defines the pallete number. This indexes a lookup table which contains the required 4bit output per 1bit input.
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; GPU:
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GPUPARAM EQU 0B2H ; 0xB2 set parameters. Store parameters in a long word to be used by the graphics command processor.
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; The parameter word is 128 bit and each write to the parameter word shifts left by 8 bits and adds the new byte at bits 7:0.
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GPUCMD EQU 0B3H ; 0xB3 set the graphics processor unit commands.
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GPUSTATUS EQU 0B3H ; [7;1] - FSM state, [0] - 1 = busy, 0 = idle
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; Bits [5:0] - 0 = Reset parameters.
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; 1 = Clear to val. Start Location (16 bit), End Location (16 bit), Red Filter, Green Filter, Blue Filter
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;
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VMCTRL EQU 0B8H ; Video Module control register. [2:0] - 000 (default) = MZ80A, 001 = MZ-700, 010 = MZ800, 011 = MZ80B, 100 = MZ80K, 101 = MZ80C, 110 = MZ1200, 111 = MZ2000. [3] = 0 - 40 col, 1 - 80 col.
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VMGRMODE EQU 0B9H ; Video Module graphics mode. 7/6 = Operator (00=OR,01=AND,10=NAND,11=XOR), 5=GRAM Output Enable, 4 = VRAM Output Enable, 3/2 = Write mode (00=Page 1:Red, 01=Page 2:Green, 10=Page 3:Blue, 11=Indirect), 1/0=Read mode (00=Page 1:Red, 01=Page2:Green, 10=Page 3:Blue, 11=Not used).
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VMREDMASK EQU 0BAH ; Video Module Red bit mask (1 bit = 1 pixel, 8 pixels per byte).
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VMGREENMASK EQU 0BBH ; Video Module Green bit mask (1 bit = 1 pixel, 8 pixels per byte).
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VMBLUEMASK EQU 0BCH ; Video Module Blue bit mask (1 bit = 1 pixel, 8 pixels per byte).
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VMPAGE EQU 0BDH ; Video Module memory page register. [1:0] switches in 1 16Kb page (3 pages) of graphics ram to C000 - FFFF. Bits [1:0] = page, 00 = off, 01 = Red, 10 = Green, 11 = Blue. This overrides all MZ700/MZ80B page switching functions. [7] 0 - normal, 1 - switches in CGROM for upload at D000:DFFF.
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VMVGATTR EQU 0BEH ; Select VGA Border colour and attributes. Bit 2 = Red, 1 = Green, 0 = Blue.
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VMVGAMODE EQU 0BFH ; Select VGA output mode. Bits [3:0] - Output mode.
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GDCRTC EQU 0CFH ; MZ-800 CRTC control register
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GDCMD EQU 0CEH ; MZ-800 CRTC Mode register
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GDGRF EQU 0CDH ; MZ-800 read format register
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GDGWF EQU 0CCH ; MZ-800 write format register
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MMIO0 EQU 0E0H ; MZ-700/MZ-800 Memory Management Set 0
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MMIO1 EQU 0E1H ; MZ-700/MZ-800 Memory Management Set 1
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MMIO2 EQU 0E2H ; MZ-700/MZ-800 Memory Management Set 2
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MMIO3 EQU 0E3H ; MZ-700/MZ-800 Memory Management Set 3
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MMIO4 EQU 0E4H ; MZ-700/MZ-800 Memory Management Set 4
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MMIO5 EQU 0E5H ; MZ-700/MZ-800 Memory Management Set 5
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MMIO6 EQU 0E6H ; MZ-700/MZ-800 Memory Management Set 6
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MMIO7 EQU 0E7H ; MZ-700/MZ-800 Memory Management Set 7
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SYSCTRL EQU 0F0H ; System board control register. [2:0] - 000 MZ80A Mode, 2MHz CPU/Bus, 001 MZ80B Mode, 4MHz CPU/Bus, 010 MZ700 Mode, 3.54MHz CPU/Bus.
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GRAMMODE EQU 0F4H ; MZ80B Graphics mode. Bit 0 = 0, Write to Graphics RAM I, Bit 0 = 1, Write to Graphics RAM II. Bit 1 = 1, blend Graphics RAM I output on display, Bit 2 = 1, blend Graphics RAM II output on display.
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;-----------------------------------------------
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; CPLD Configuration constants.
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;-----------------------------------------------
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MODE_MZ80K EQU 0 ; Set to MZ-80K mode.
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MODE_MZ80C EQU 1 ; Set to MZ-80C mode.
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MODE_MZ1200 EQU 2 ; Set to MZ-1200 mode.
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MODE_MZ80A EQU 3 ; Set to MZ-80A mode (base mode on MZ-80A hardware).
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MODE_MZ700 EQU 4 ; Set to MZ-700 mode (base mode on MZ-700 hardware).
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MODE_MZ800 EQU 5 ; Set to MZ-800 mode.
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MODE_MZ80B EQU 6 ; Set to MZ-80B mode.
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MODE_MZ2000 EQU 7 ; Set to MZ-2000 mode.
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MODE_VIDEO_FPGA EQU 8 ; Bit flag (bit 3) to switch CPLD into using the new FPGA video hardware.
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MODE_RESET_PRESERVE EQU 080H ; Preserve register configuration through reset.
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;-----------------------------------------------
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; CPLD Command Instruction constants.
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;-----------------------------------------------
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CPLD_RESET_HOST EQU 1 ; CPLD level command to reset the host system.
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CPLD_HOLD_HOST_BUS EQU 2 ; CPLD command to hold the host bus.
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CPLD_RELEASE_HOST_BUS EQU 3 ; CPLD command to release the host bus.
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;-----------------------------------------------
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; FPGA CPU enhancement control bits.
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;-----------------------------------------------
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CPUMODE_SET_Z80 EQU 000H ; Set the CPU to the hard Z80.
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CPUMODE_SET_T80 EQU 001H ; Set the CPU to the soft T80.
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CPUMODE_SET_ZPU_EVO EQU 002H ; Set the CPU to the soft ZPU Evolution.
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CPUMODE_SET_EMU_MZ EQU 004H ; Set the hardware to enable the Sharp MZ Series emulations.
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CPUMODE_SET_BBB EQU 008H ; Place holder for a future soft CPU.
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CPUMODE_SET_CCC EQU 010H ; Place holder for a future soft CPU.
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CPUMODE_SET_DDD EQU 020H ; Place holder for a future soft CPU.
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CPUMODE_IS_Z80 EQU 000H ; Status value to indicate if the hard Z80 available.
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CPUMODE_IS_T80 EQU 001H ; Status value to indicate if the soft T80 available.
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CPUMODE_IS_ZPU_EVO EQU 002H ; Status value to indicate if the soft ZPU Evolution available.
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CPUMODE_IS_EMU_MZ EQU 004H ; Status value to indicate the Sharp MZ Series Hardware Emulation logic is available.
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CPUMODE_IS_BBB EQU 008H ; Place holder to indicate if a future soft CPU is available.
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CPUMODE_IS_CCC EQU 010H ; Place holder to indicate if a future soft CPU is available.
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CPUMODE_IS_DDD EQU 020H ; Place holder to indicate if a future soft CPU is available.
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CPUMODE_RESET_CPU EQU 080H ; Reset the soft CPU. Active high, when high the CPU is held in RESET, when low the CPU runs.
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CPUMODE_IS_SOFT_AVAIL EQU 040H ; Marker to indicate if the underlying FPGA can support soft CPU's.
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CPUMODE_IS_SOFT_MASK EQU 0C0H ; Mask to filter out the Soft CPU availability flags.
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CPUMODE_IS_CPU_MASK EQU 03FH ; Mask to filter out which soft CPU's are available.
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;-----------------------------------------------
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; Video Module control bits.
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;-----------------------------------------------
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MODE_80CHAR EQU 010H ; Enable 80 character display.
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MODE_COLOUR EQU 020H ; Enable colour display.
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SYSMODE_MZ80A EQU 000H ; System board mode MZ80A, 2MHz CPU/Bus.
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SYSMODE_MZ80B EQU 020H ; System board mode MZ80B, 4MHz CPU/Bus.
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SYSMODE_MZ2000 EQU 020H ; System board mode MZ2000, 4MHz CPU/Bus.
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SYSMODE_MZ700 EQU 042H ; System board mode MZ700, 3.54MHz CPU/Bus.
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VMMODE_MZ80K EQU 000H ; Video mode = MZ80K
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VMMODE_MZ80C EQU 001H ; Video mode = MZ80C
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VMMODE_MZ1200 EQU 002H ; Video mode = MZ1200
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VMMODE_MZ80A EQU 003H ; Video mode = MZ80A
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VMMODE_MZ700 EQU 004H ; Video mode = MZ700
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VMMODE_MZ800 EQU 005H ; Video mode = MZ800
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VMMODE_MZ1500 EQU 006H ; Video mode = MZ1500
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VMMODE_MZ80B EQU 007H ; Video mode = MZ80B
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VMMODE_MZ2000 EQU 008H ; Video mode = MZ2000
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VMMODE_MZ2200 EQU 009H ; Video mode = MZ2200
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VMMODE_MZ2500 EQU 00AH ; Video mode = MZ2500
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VMMODE_PCGRAM EQU 020H ; Enable PCG RAM.
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VMMODE_VGA_OFF EQU 000H ; Set VGA mode off, external monitor is driven by standard internal 60Hz signals.
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VMMODE_VGA_INT EQU 000H ; Set VGA mode off, external monitor is driven by standard internal 60Hz signals.
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VMMODE_VGA_INT50 EQU 001H ; Set VGA mode off, external monitor is driven by standard internal 50Hz signals.
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VMMODE_VGA_640x480 EQU 002H ; Set external monitor to VGA 640x480 @ 60Hz mode.
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VMMODE_VGA_800x600 EQU 003H ; Set external monitor to VGA 800x600 @ 60Hz mode.
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;-----------------------------------------------
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; GPU commands.
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;-----------------------------------------------
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GPUCLEARVRAM EQU 001H ; Clear the VRAM without updating attributes.
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GPUCLEARVRAMCA EQU 002H ; Clear the VRAM/ARAM with given attribute byte,
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GPUCLEARVRAMP EQU 003H ; Clear the VRAM/ARAM with parameters.
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GPUCLEARGRAM EQU 081H ; Clear the entire Framebuffer.
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GPUCLEARGRAMP EQU 082H ; Clear the Framebuffer according to parameters.
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GPURESET EQU 0FFH ; Reset the GPU, return to idle state.
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;-----------------------------------------------
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; tranZPUter SW Memory Management modes
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;-----------------------------------------------
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TZMM_ORIG EQU 000H ; Original Sharp MZ80A mode, no tranZPUter features are selected except the I/O control registers (default: 0x60-063).
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TZMM_BOOT EQU 001H ; Original mode but E800-EFFF is mapped to tranZPUter RAM so TZFS can be booted.
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TZMM_TZFS EQU 002H ; TZFS main memory configuration. all memory is in tranZPUter RAM, E800-FFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected.
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TZMM_TZFS2 EQU 003H ; TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 1.
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TZMM_TZFS3 EQU 004H ; TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 2.
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TZMM_TZFS4 EQU 005H ; TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 3.
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TZMM_CPM EQU 006H ; CPM main memory configuration, all memory on the tranZPUter board, 64K block 4 selected. Special case for F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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TZMM_CPM2 EQU 007H ; CPM main memory configuration, F000-FFFF are on the tranZPUter board in block 4, 0040-CFFF and E800-EFFF are in block 5, mainboard for D000-DFFF (video), E000-E800 (Memory control) selected.
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; Special case for 0000:003F (interrupt vectors) which resides in block 4, F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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TZMM_COMPAT EQU 008H + TZMM_ENIOWAIT ; Original mode but with main DRAM in Bank 0 to allow bootstrapping of programs from other machines such as the MZ700.
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TZMM_HOSTACCESS EQU 009H + TZMM_ENIOWAIT ; Mode to allow code running in Bank 0, address E800:FFFF to access host memory. Monitor ROM 0000-0FFF and Main DRAM 0x1000-0xD000, video and memory mapped I/O are on the host machine, User/Floppy ROM E800-FFFF are in tranZPUter memory.
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TZMM_MZ700_0 EQU 00AH + TZMM_ENIOWAIT ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the mainboard.
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TZMM_MZ700_1 EQU 00BH + TZMM_ENIOWAIT ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
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TZMM_MZ700_2 EQU 00CH + TZMM_ENIOWAIT ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
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TZMM_MZ700_3 EQU 00DH + TZMM_ENIOWAIT ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
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TZMM_MZ700_4 EQU 00EH + TZMM_ENIOWAIT ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
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TZMM_MZ800 EQU 00FH + TZMM_ENIOWAIT ; MZ800 Mode - Tracks original hardware mode offering MZ700/MZ800 configurations.
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TZMM_MZ2000 EQU 010H + TZMM_ENIOWAIT; ; MZ2000 Mode - Running on MZ2000 hardware, configuration set according to runtime configuration registers.
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TZMM_FPGA EQU 015H + TZMM_ENIOWAIT ; Open up access for the K64F to the FPGA resources such as memory. All other access to RAM or mainboard is blocked.
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TZMM_TZPUM EQU 016H + TZMM_ENIOWAIT ; Everything in on mainboard, no access to tranZPUter memory.
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TZMM_TZPU EQU 017H + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected.
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;TZMM_TZPU0 EQU 018H + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected.
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;TZMM_TZPU1 EQU 019H + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 1 is selected.
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;TZMM_TZPU2 EQU 01AH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 2 is selected.
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;TZMM_TZPU3 EQU 01BH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 3 is selected.
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;TZMM_TZPU4 EQU 01CH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 4 is selected.
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;TZMM_TZPU5 EQU 01DH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 5 is selected.
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;TZMM_TZPU6 EQU 01EH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 6 is selected.
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;TZMM_TZPU7 EQU 01FH + TZMM_ENIOWAIT ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 7 is selected.
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;-----------------------------------------------
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; TZ File System Header (MZF)
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;-----------------------------------------------
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TZFS_ATRB: EQU 00000h ; Code Type, 01 = Machine Code.
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TZFS_NAME: EQU 00001h ; Title/Name (17 bytes).
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TZFS_SIZE: EQU 00012h ; Size of program.
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TZFS_DTADR: EQU 00014h ; Load address of program.
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TZFS_EXADR: EQU 00016h ; Exec address of program.
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TZFS_COMNT: EQU 00018h ; Comment
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TZFS_MZFLEN: EQU 128 ; Length of the MZF header.
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TZFS_CMTLEN: EQU 104 ; Length of the comment field
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;-----------------------------------------------
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; BIOS WORK AREA (MZ80A)
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;-----------------------------------------------
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