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Added tape delay compensation command

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This commit is contained in:
Philip Smart
2023-05-14 23:23:21 +01:00
parent 3693b10207
commit 6ad5730e67
8 changed files with 587 additions and 452 deletions
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2
asm/include/tzfs_definitions.asm
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@@ -37,7 +37,7 @@
BUILD_MZ80A EQU 0 ; Build for the standard Sharp MZ80A, no lower memory.
BUILD_MZ700 EQU 1 ; Build for the Sharp MZ-700 base hardware.
BUILD_MZ2000 EQU 0 ; Build for the Sharp MZ-2000 base hardware.
BUILD_FUSIONX EQU 1 ; Build for the set host using the FusionX board.
BUILD_FUSIONX EQU 0 ; Build for the set host using the FusionX board.
; Debugging
ENADEBUG EQU 0 ; Enable debugging logic, 1 = enable, 0 = disable

1
asm/include/tzfs_variables.asm
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@@ -74,5 +74,6 @@ CMTDLY1CNTM: DS virtual 1 ; Short
CMTDLY1CNTS: DS virtual 1 ; Short pulse delay count SPACE
CMTDLY2CNTM: DS virtual 1 ; Long pulse delay count MARK
CMTDLY2CNTS: DS virtual 1 ; Long pulse delay count SPACE
CMTDLYCOMP: DS virtual 1 ; Tape delay compensation, -128..+127, to compensate for tape stretch or drive band decay.
DS virtual (TZVARMEM + TZVARSIZE) - $ ; Top of variable area downwards is used as the working stack, SA1510 space isnt used.
TZSTACK: EQU TZVARMEM + TZVARSIZE

208
asm/tzfs.asm
View File

@@ -32,6 +32,7 @@
;- Feb 2023 v1.7 - TZFS now running on FusionX. Changes to ensure compatibility and
;- addition of new commands, assemble, disassemble, fill, write I/O,
;- read I/O.
;- May 2023 v1.8 - Added tape delay compensation command.
;-
;--------------------------------------------------------------------------------------------------------
;- This source file is free software: you can redistribute it and-or modify
@@ -132,9 +133,10 @@ SET_FREQ: JP ?SETFREQ ; UROMA
?PRTSTR: CALLBNK PRTSTR, TZMM_TZFS2
?HELP: CALLBNK HELP, TZMM_TZFS2
?MCORX: CALLBNK MCORX, TZMM_TZFS3
?COPYM: CALLBNK COPYM, TZMM_TZFS4
?WRITEIO: CALLBNK WRITEIO, TZMM_TZFS4
?READIO: CALLBNK READIO, TZMM_TZFS4
?TAPECOMP: CALLBNK TAPECOMP, TZMM_TZFS3
?COPYM: CALLBNK COPYM, TZMM_TZFS3
?WRITEIO: CALLBNK WRITEIO, TZMM_TZFS3
?READIO: CALLBNK READIO, TZMM_TZFS3
?DUMPBC: CALLBNK DUMPBC, TZMM_TZFS3
?DUMPX: CALLBNK DUMPX, TZMM_TZFS3
?DUMP: CALLBNK DUMP, TZMM_TZFS3
@@ -144,15 +146,15 @@ SET_FREQ: JP ?SETFREQ ; UROMA
?DASM: CALLBNK DASM_MAIN, TZMM_TZFS4
?ASM: CALLBNK ASM_MAIN, TZMM_TZFS4
IF BUILD_FUSIONX = 0
?SETVMODE: CALLBNK SETVMODE, TZMM_TZFS4
?SETVGAMODE:CALLBNK SETVGAMODE, TZMM_TZFS4
?SETVBORDER:CALLBNK SETVBORDER, TZMM_TZFS4
?SETVMODE: CALLBNK SETVMODE, TZMM_TZFS3
?SETVGAMODE: CALLBNK SETVGAMODE,TZMM_TZFS3
?SETVBORDER: CALLBNK SETVBORDER,TZMM_TZFS3
ENDIF ; BUILD_FUSIONX
?SETFREQ: CALLBNK SETFREQ, TZMM_TZFS4
?SETFREQ: CALLBNK SETFREQ, TZMM_TZFS3
IF BUILD_FUSIONX = 0
?SETT80: CALLBNK SETT80, TZMM_TZFS4
?SETZ80: CALLBNK SETZ80, TZMM_TZFS4
?SETZPUEVO: CALLBNK SETZPUEVO, TZMM_TZFS4
?SETT80: CALLBNK SETT80, TZMM_TZFS3
?SETZ80: CALLBNK SETZ80, TZMM_TZFS3
?SETZPUEVO: CALLBNK SETZPUEVO, TZMM_TZFS3
ENDIF ; BUILD_FUSIONX
?TIMERTST: CALLBNK TIMERTST, TZMM_TZFS3
?PTESTX: CALLBNK PTESTX, TZMM_TZFS3
@@ -164,17 +166,17 @@ CNV_ATOS: CALLBNK CNVSTR_AS, TZMM_TZFS2 ;
?WRITZFS: CALLBNK WRITZFS, TZMM_TZFS3
?WRDTZFS: CALLBNK WRDTZFS, TZMM_TZFS3
IF BUILD_FUSIONX = 0
?SETMZ80K: CALLBNK SETMZ80K, TZMM_TZFS4
?SETMZ80C: CALLBNK SETMZ80C, TZMM_TZFS4
?SETMZ1200: CALLBNK SETMZ1200, TZMM_TZFS4
?SETMZ80A: CALLBNK SETMZ80A, TZMM_TZFS4
?SETMZ700: CALLBNK SETMZ700, TZMM_TZFS4
?SETMZ1500: CALLBNK SETMZ1500, TZMM_TZFS4
?SETMZ800: CALLBNK SETMZ800, TZMM_TZFS4
?SETMZ80B: CALLBNK SETMZ80B, TZMM_TZFS4
?SETMZ2000: CALLBNK SETMZ2000, TZMM_TZFS4
?SETMZ2200: CALLBNK SETMZ2200, TZMM_TZFS4
?SETMZ2500: CALLBNK SETMZ2500, TZMM_TZFS4
?SETMZ80K: CALLBNK SETMZ80K, TZMM_TZFS3
?SETMZ80C: CALLBNK SETMZ80C, TZMM_TZFS3
?SETMZ1200: CALLBNK SETMZ1200, TZMM_TZFS3
?SETMZ80A: CALLBNK SETMZ80A, TZMM_TZFS3
?SETMZ700: CALLBNK SETMZ700, TZMM_TZFS3
?SETMZ1500: CALLBNK SETMZ1500, TZMM_TZFS3
?SETMZ800: CALLBNK SETMZ800, TZMM_TZFS3
?SETMZ80B: CALLBNK SETMZ80B, TZMM_TZFS3
?SETMZ2000: CALLBNK SETMZ2000, TZMM_TZFS3
?SETMZ2200: CALLBNK SETMZ2200, TZMM_TZFS3
?SETMZ2500: CALLBNK SETMZ2500, TZMM_TZFS3
ENDIF ; BUILD_FUSIONX
;-----------------------------------------
@@ -210,81 +212,8 @@ MONITOR: LD A, (SCRNMODE)
MONITOR1: LD HL,DSPCTL ; Control register address for the 40/80 Colour Card.
LD A, C ; Recall screen mode.
BIT 0, A
JR NZ, SET80CHAR
;
SET40CHAR: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JR Z,SET40_1
;
AND 007H ; Get the base machine mode, use as the starting mode for the video.
LD D, A
LD A, C ; Check to see if a mode override has been set.
BIT 2, A
LD A, VMMODE_VGA_OFF
JR Z, SET40_0
;
LD A, C ; Recall the stored mode and ready for register update.
RRCA
RRCA
RRCA
RRCA
AND 00FH
LD D,A
;
LD A, (SCRNMODE2) ; Get the VGA mode and set.
SET40_0: OUT (VMVGAMODE), A
LD A, D
OUT (VMCTRL),A ; Activate.
JR SET40_2
;
SET40_1: XOR A ; 40 char mode.
LD E,(HL) ; Dummy operation to enable latch write via multivibrator.
LD (HL), A
;
SET40_2: XOR A
LD (SPAGE), A ; Allow MZ80A scrolling
JR SIGNON
;
SET80CHAR: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JR Z,SET80_1 ; No FPGA hardware so try and set set 80 char mode on the assumption the 40/80 Colour Card is installed.
;
AND 007H
OR MODE_80CHAR ; Set 80 char flag.
LD D, A
;
LD A, C ; Check to see if a mode override has been set.
BIT 2, A
LD A, VMMODE_VGA_OFF
JR Z, SET80_0
LD A, C ; Recall the stored mode and ready for register update.
RRCA
RRCA
RRCA
RRCA
AND 00FH
OR MODE_80CHAR ; Set 80 char flag.
LD D,A
;
LD A, (SCRNMODE2) ; Get the VGA mode and set.
SET80_0: OUT (VMVGAMODE),A
LD A, D
OR MODE_80CHAR ; Set 80 char flag.
OUT (VMCTRL),A ; Activate.
LD A, C ; Indicate we are using the FPGA video hardware.
SET 1, A
LD (SCRNMODE), A
JR SET80_2
;
SET80_1: LD A, 128 ; 80 char mode.
LD E,(HL) ; Dummy operation to enable latch write via multivibrator.
LD (HL), A
;
SET80_2: LD A, 0FFH
LD (SPAGE), A ; MZ80K Scrolling in 80 column mode for time being.
JP NZ, SET80CHAR
JP SET40CHAR
;
SIGNON: LD A,0C4h ; Move cursor left to overwrite part of SA-1510/monitor banner.
LD E,004h ; 4 times.
@@ -507,7 +436,6 @@ HEXIYX2: POP AF ; Waste
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------------------
; RAM STORAGE AREA
;-------------------------------------------------------------------------------------------
@@ -559,6 +487,85 @@ SETMEM: LD (HL),A
;
;====================================
; Setup the screen as 40x25 chars.
SET40CHAR: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JR Z,SET40_1
;
AND 007H ; Get the base machine mode, use as the starting mode for the video.
LD D, A
LD A, C ; Check to see if a mode override has been set.
BIT 2, A
LD A, VMMODE_VGA_OFF
JR Z, SET40_0
;
LD A, C ; Recall the stored mode and ready for register update.
RRCA
RRCA
RRCA
RRCA
AND 00FH
LD D,A
;
LD A, (SCRNMODE2) ; Get the VGA mode and set.
SET40_0: OUT (VMVGAMODE), A
LD A, D
OUT (VMCTRL),A ; Activate.
JR SET40_2
;
SET40_1: XOR A ; 40 char mode.
LD E,(HL) ; Dummy operation to enable latch write via multivibrator.
LD (HL), A
;
SET40_2: XOR A
LD (SPAGE), A ; Allow MZ80A scrolling
JP SIGNON
;
; Setup the screen as 80x25 chars.
;
SET80CHAR: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JR Z,SET80_1 ; No FPGA hardware so try and set set 80 char mode on the assumption the 40/80 Colour Card is installed.
;
AND 007H
OR MODE_80CHAR ; Set 80 char flag.
LD D, A
;
LD A, C ; Check to see if a mode override has been set.
BIT 2, A
LD A, VMMODE_VGA_OFF
JR Z, SET80_0
LD A, C ; Recall the stored mode and ready for register update.
RRCA
RRCA
RRCA
RRCA
AND 00FH
OR MODE_80CHAR ; Set 80 char flag.
LD D,A
;
LD A, (SCRNMODE2) ; Get the VGA mode and set.
SET80_0: OUT (VMVGAMODE),A
LD A, D
OR MODE_80CHAR ; Set 80 char flag.
OUT (VMCTRL),A ; Activate.
LD A, C ; Indicate we are using the FPGA video hardware.
SET 1, A
LD (SCRNMODE), A
JR SET80_2
;
SET80_1: LD A, 128 ; 80 char mode.
LD E,(HL) ; Dummy operation to enable latch write via multivibrator.
LD (HL), A
;
SET80_2: LD A, 0FFH
LD (SPAGE), A ; MZ80K Scrolling in 80 column mode for time being.
JP SIGNON
;
; Commands to start the machine in its original mode loading either a 40 or 80 column BIOS as directed.
SETMODE40: IN A,(CPLDINFO) ; Get configuration of hardware.
AND 07H ; Get model info.
@@ -2548,6 +2555,9 @@ CMDTABLE: ;DB 000H | 000H | 000H | 003H
DB "T80" ; Switch to soft T80 CPU.
DW ?SETT80
ENDIF
DB 000H | 000H | 000H | 002H
DB "TC" ; Tape timing compensation.
DW ?TAPECOMP
DB 000H | 000H | 000H | 001H
DB 'T' ; Timer test.
DW ?TIMERTST
@@ -2578,14 +2588,12 @@ CMDTABLE: ;DB 000H | 000H | 000H | 003H
DB 000H | 000H | 000H | 001H
ENDIF
;-------------------------------------------------------------------------------
; END OF TZFS COMMAND FUNCTIONS.
;-------------------------------------------------------------------------------
;
; Ensure we fill the entire 6K by padding with FF's.
; Ensure we fill the entire 64K by padding with 00's.
;
ALIGN_NOPS 10000H
MEND:

36
asm/tzfs_bank2.asm
View File

@@ -18,6 +18,7 @@
;- Dec 2020 - Updates to accommodate v1.3 of the tranZPUter SW-700 board where soft
;- CPU's now become possible.
;- Feb 2023 - TZFS now running on FusionX. Small changes to ensure compatibility.
;- May 2023 - Added tape delay compensation command.
;-
;--------------------------------------------------------------------------------------------------------
;- This source file is free software: you can redistribute it and-or modify
@@ -415,10 +416,10 @@ FDCJMPL2: JP (IX)
;-------------------------------------------------------------------------------
; 0 + <- 39
; -----------------------------------------
MSGSON: DB "+ TZFS v1.7.1 ", NULL ; Version 1.0-> first split from RFS v2.0
MSGSON: DB "+ TZFS v1.8.0 ", NULL ; Version 1.0-> first split from RFS v2.0
MSGSONEND: DB " **", CR, NULL ; Signon banner termination.
IF BUILD_FUSIONX = 0
MSGSONT80: DB "(T80)", NULL ; T80 CPU detected.
MSGSONT80: IF BUILD_FUSIONX = 0
DB "(T80)", NULL ; T80 CPU detected.
ENDIF ; BUILD_FUSIONX
MSGNOTFND: DB "Not Found", CR, NULL
MSGBADCMD: DB "???", CR, NULL
@@ -449,14 +450,26 @@ MSGFAILBIOS:DB "Failed to load alternate BIOS!",
MSGFAILEXIT:DB "TZFS exit failed, I/O proc error!", CR, NULL
MSGFREQERR: DB "Error, failed to change frequency!", CR, NULL
MSGBADNUM: DB "Error, bad number supplied!", CR, NULL
IF BUILD_FUSIONX = 0
MSGNOFPGA: DB "Error, no FPGA video module!", CR, NULL
MSGT80ERR: DB "Error, failed to switch to T80 CPU!", CR, NULL
MSGZ80ERR: DB "Error, failed to switch to Z80 CPU!", CR, NULL
MSGZPUERR: DB "Error, failed to switch to ZPU CPU!", CR, NULL
MSGNOSOFTCPU:DB "No soft cpu hardware!", CR, NULL
MSGNOT80CPU:DB "T80 not available!", CR, NULL
MSGNOEMU: DB "No Sharp MZ Series Emu hardware!", CR, NULL
MSGNOFPGA: IF BUILD_FUSIONX = 0
DB "Error, no FPGA video module!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGT80ERR: IF BUILD_FUSIONX = 0
DB "Error, failed to switch to T80 CPU!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGZ80ERR: IF BUILD_FUSIONX = 0
DB "Error, failed to switch to Z80 CPU!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGZPUERR: IF BUILD_FUSIONX = 0
DB "Error, failed to switch to ZPU CPU!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGNOSOFTCPU:IF BUILD_FUSIONX = 0
DB "No soft cpu hardware!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGNOT80CPU:IF BUILD_FUSIONX = 0
DB "T80 not available!", CR, NULL
ENDIF ; BUILD_FUSIONX
MSGNOEMU: IF BUILD_FUSIONX = 0
DB "No Sharp MZ Series Emu hardware!", CR, NULL
ENDIF ; BUILD_FUSIONX
;
OKCHECK: DB ", CHECK: ", CR, NULL
@@ -558,6 +571,7 @@ HELPSCR: ; "--------- 40 column width -------------"
DB " save mem to card, XXXX=start", 00DH
DB " YYYY=end, ZZZZ=exec", 00DH
DB "T test timer", 00DH
DB "TC[-]XX set tape delay compensation", 00DH
DB "T2SD[B][,M]", 00DH
DB " copy tape to SD, B=Bulk", 00DH
IF BUILD_FUSIONX = 0

442
asm/tzfs_bank3.asm
View File

@@ -614,6 +614,8 @@ SLPT: DB 01H ; TEXT
;-------------------------------------------------------------------------------
; Method to setup the delay loop count to set the half-wave period of the sampling, short and long CMT pulses.
; To allow the user to compensate for tape stretch or drive belt wear, a compensation value can be added/subtracted
; from the precise time values.
;
; Opcode timings:
; CALL - 17 T-states time from caller into function.
@@ -630,6 +632,10 @@ SLPT: DB 01H ; TEXT
; MZ-700 - x = ((delay * 3540000) - 66) / 14
; MZ-80A - x = ((delay * 2000000) - 66) / 14
CMTSETDLY: IF BUILD_MZ700 > 0
PUSH BC ; Store the compensation value in B to be added into fixed delay value.
LD A,(CMTDLYCOMP)
LD B,A
;
LD A,(HWMODEL) ; Get the machine model we are conforming to.
CP 5 ; MZ-800 has its own timing.
JR Z,CMTSETDLY0
@@ -640,43 +646,64 @@ CMTSETDLY: IF BUILD_MZ700 > 0
;
; K Series
LD A,86 ; Remainder of the machines use a 1200 baud setting,
ADD A,B
LD (CMTSAMPLECNT),A ; 368uS sample point.
LD A,56 ;
ADD A,B
LD (CMTDLY1CNTM),A ; 240us
LD A,62 ;
ADD A,B
LD (CMTDLY1CNTS),A ; + 264uS = 504uS
LD A,113
ADD A,B
LD (CMTDLY2CNTM),A ; 464uS
LD A,120
ADD A,B
LD (CMTDLY2CNTS),A ; + 494uS = 958uS
RET
JR CMTDLYEXIT
; MZ-800
CMTSETDLY0: LD A,89 ; 379uS sample point
ADD A,B
LD (CMTSAMPLECNT),A
LD A,56 ; 240uS
ADD A,B
LD (CMTDLY1CNTM),A
LD A,66 ; + 278uS = 518uS
ADD A,B
LD (CMTDLY1CNTS),A
LD A,114 ; 470uS
ADD A,B
LD (CMTDLY2CNTM),A ;
LD A,120 ; + 494uS = 964uS
ADD A,B
LD (CMTDLY2CNTS),A ;
RET
JR CMTDLYEXIT
; B Series
CMTSETDLY1: LD A,52 ; 255uS sample point.
ADD A,B
LD (CMTSAMPLECNT),A
LD A,37 ; 166.75uS
ADD A,B
LD (CMTDLY1CNTM),A
LD A,37 ; + 166uS = 332.75uS
ADD A,B
LD (CMTDLY1CNTS),A
LD A,80 ; 333uS
ADD A,B
LD (CMTDLY2CNTM),A ;
LD A,80 ; + 334uS = 667uS
ADD A,B
LD (CMTDLY2CNTS),A ;
JR CMTDLYEXIT
ENDIF
; The values below are for an MZ-80A running at 2MHz under the FusionX board.
; If TZFS runs on more platforms then a table will be the best method forward.
IF BUILD_MZ80A > 0
PUSH BC ; Store the compensation value in B to be added into fixed delay value.
LD A,(CMTDLYCOMP)
LD B,A
;
LD A,(HWMODEL) ; Get the machine model we are conforming to.
CP 5 ; MZ-800 has its own timing.
JR Z,CMTSETDLY0
@@ -687,43 +714,59 @@ CMTSETDLY1: LD A,52 ; 2
;
; K Series
LD A,47 ; Remainder of the machines use a 1200 baud setting,
ADD A,B
LD (CMTSAMPLECNT),A ; 368uS sample point.
LD A,30 ;
ADD A,B
LD (CMTDLY1CNTM),A ; 240us
LD A,33 ;
ADD A,B
LD (CMTDLY1CNTS),A ; + 264uS = 504uS
LD A,62
ADD A,B
LD (CMTDLY2CNTM),A ; 464uS
LD A,66
ADD A,B
LD (CMTDLY2CNTS),A ; + 494uS = 958uS
RET
JR CMTDLYEXIT
; MZ-800
CMTSETDLY0: LD A,49 ; 379uS sample point
ADD A,B
LD (CMTSAMPLECNT),A
LD A,30 ; 240uS
ADD A,B
LD (CMTDLY1CNTM),A
LD A,35 ; + 278uS = 518uS
ADD A,B
LD (CMTDLY1CNTS),A
LD A,62 ; 470uS
ADD A,B
LD (CMTDLY2CNTM),A ;
LD A,66 ; + 494uS = 964uS
ADD A,B
LD (CMTDLY2CNTS),A ;
RET
JR CMTDLYEXIT
; B Series
CMTSETDLY1: LD A,32 ; 255uS sample point.
ADD A,B
LD (CMTSAMPLECNT),A
LD A,19 ; 166.75uS
ADD A,B
LD (CMTDLY1CNTM),A
LD A,19 ; + 166uS = 332.75uS
ADD A,B
LD (CMTDLY1CNTS),A
LD A,43 ; 333uS
ADD A,B
LD (CMTDLY2CNTM),A ;
LD A,43 ; + 334uS = 667uS
ADD A,B
LD (CMTDLY2CNTS),A ;
JR CMTDLYEXIT
ENDIF
CMTDLYEXIT: POP BC
RET
;READ INFORMATION
; CF=1:ERROR
RDITZFS: DI
@@ -1232,6 +1275,395 @@ FILLERR: LD DE,MSGNOPARAM
CALL ?PRINTMSG
RET
; Tape Compensation Setup.
; Set a value which is added to or subtracted from the tape delay timing.
; This compensation value is to allow for old stretched tapes or machines with warped/stretched drive bands.
;
TAPECOMP: LD A,(DE) ; Test the first character, if minus then set bit 0 in B for later use.
CP '-'
LD A,0
JR NZ,TAPECOMP1
INC DE ; Skip over minus.
INC A ; Set bit 0 to indicate negative number.
TAPECOMP1: LD B,A
CALL ConvertStringToNumber ; Convert the input into compensation value.
JP NZ,BADNUMERR
LD A,L
CP 080H ; Numbers > 127 are illegal.
JP NC,BADNUMERR
BIT 0,B
JR Z,TAPECOMP2
NEG
TAPECOMP2: LD (CMTDLYCOMP),A ; Store compensation value to be used by delay calculations.
RET
; Copy - Source, Destination, Size.
COPYM: CALL READ4HEX ; Start address
JR C,COPYMERR
LD (TMPADR),HL
CALL READ4HEX
JR C,COPYMERR
LD (TMPCNT),HL
CALL READ4HEX
JR C,COPYMERR
PUSH HL
POP BC
LD HL,(TMPCNT)
LD DE,(TMPADR)
LDIR
COPYMERR: RET
; Write to I/O port. 16bit address to BC, 8bit value to A.
WRITEIO: CALL READ4HEX ; Get 16bit I/O port.
JR C,WRITEIOER
PUSH HL ; Swap to BC so B=15:8, C=7:0
POP BC
CALL _2HEX ; Get 8 bit data.
OUT (C),A ; Write 8 bit data to 16bit port.
WRITEIOER: RET
; Read 16bit I/O port value.
READIO: CALL READ4HEX ; Get 16bit I/O port.
JR C,READIOER
PUSH HL ; Swap to BC so B=15:8, C=7:0
POP BC
IN A,(C) ; Get 8bit value from 16bit I/O port.
CALL PRTHX ; Print.
CALL NL
READIOER: RET
; FusionX doesnt yet have the video capabilities, so no need to build in the logic.
SETVMODE: IF BUILD_FUSIONX = 0
; Method to set the video mode.
; Param: 0 - Enable FPGA and set to MZ-80K mode.
; 1 - Enable FPGA and set to MZ-80C mode.
; 2 - Enable FPGA and set to MZ-1200 mode.
; 3 - Enable FPGA and set to MZ-80A mode (base mode on MZ-80A hardware).
; 4 - Enable FPGA and set to MZ-700 mode (base mode on MZ-700 hardware).
; 5 - Enable FPGA and set to MZ-1500 mode.
; 6 - Enable FPGA and set to MZ-800 mode.
; 7 - Enable FPGA and set to MZ-80B mode.
; 8 - Enable FPGA and set to MZ-2000 mode.
; 9 - Enable FPGA and set to MZ-2200 mode.
; 10 - Enable FPGA and set to MZ-2500 mode.
; O - Turn off FPGA Video, turn on mainboard video.
IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
PUSH DE ; Preserve DE in case no number given.
POP BC
CALL ConvertStringToNumber ; Convert the input into 0 (disable) or frequency in KHz.
JR NZ,SETVMODEOFF
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 7.
LD A,L
CP 10
JP NC,BADNUMERR
;
SETVMODE0: IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
IN A,(VMCTRL) ; Get current setting.
AND 0F0H ; Clear old mode setting.
OR L ; Add in new setting.
OUT (VMCTRL),A
RLC L ; Shift mode to position for SCRNMODE storage.
RLC L
RLC L
RLC L
LD A,(SCRNMODE) ; Repeat for the screen mode variable, used when resetting or changing display settings.
AND 007H ; Clear video mode setting.
OR L ; Add in new setting.
SET 2, A ; Set flag to indicate video mode override - ie, dont use base machine mode.
SETVMODECLR: SET 1, A ; Ensure flag set so on restart the FPGA video mode is selected.
LD (SCRNMODE),A
LD A, 016H ; Clear the screen so we start from a known position.
CALL PRNT
LD A,071H ; Blue background and white characters.
LD HL,ARAM
CALL CLR8
RET
SETVMODEOFF: LD A,(DE)
CP 'O'
JR Z,SETVMODE1
CP 'o'
JP NZ,BADNUMERR
SETVMODE1: LD A,(SCRNMODE) ; Disable flag to enable FPGA on restart.
RES 1,A
LD (SCRNMODE),A
IN A,(CPLDCFG)
AND ~MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to disable the FPGA video mode.
OUT (CPLDCFG),A
RET
ENDIF
; Method to set the VGA output mode of the external display.
SETVGAMODE: IF BUILD_FUSIONX = 0
IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
CALL ConvertStringToNumber ; Convert the input into 0-3, 0 = off, 1 = 640x480, 2=1024x768, 3=800x600.
JP NZ,BADNUMERR
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 15.
LD A,L
CP 15
JP NC,BADNUMERR
;
; RRC L
; RRC L ; Value to top 2 bits ready to be applied to VGA mode register.
;
SETVGAMODE1: IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
LD A, L ; Add in new setting.
OUT (VMVGAMODE),A
LD (SCRNMODE2), A
JP SETVMODECLR
ENDIF
; Method to set the VGA border colour on the external display.
SETVBORDER: IF BUILD_FUSIONX = 0
IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
CALL ConvertStringToNumber ; Convert the input into 0 - 7, bit 2 = Red, 1 = Green, 0 = Blue.
JP NZ,BADNUMERR
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 7.
LD A,L
CP 7
JP NC,BADNUMERR
;
IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
LD A,L
OUT (VMVGATTR),A
RET
ENDIF ; BUILD_FUSIONX
; Method to enable/disable the alternate CPU frequency and change it's values.
;
SETFREQ: IF BUILD_FUSIONX = 0
CALL ConvertStringToNumber ; Convert the input into 0 (disable) or frequency in KHz.
JP NZ,BADNUMERR
LD (TZSVC_CPU_FREQ),HL ; Set the required frequency in the service structure.
LD A,H
CP L
JR NZ,SETFREQ1
LD A, TZSVC_CMD_CPU_BASEFREQ ; Switch to the base frequency.
JR SETFREQ2
SETFREQ1: LD A, TZSVC_CMD_CPU_ALTFREQ ; Switch to the alternate frequency.
SETFREQ2: CALL SVC_CMD
OR A
JP NZ,SETFREQERR
LD A,H
CP L
RET Z ; If we are disabling the alternate cpu frequency (ie. = 0) exit.
LD A, TZSVC_CMD_CPU_CHGFREQ ; Switch to the base frequency.
CALL SVC_CMD
OR A
JP NZ,SETFREQERR
RET
ENDIF ; BUILD_FUSIONX
; FusionX doesnt have the soft CPU capabilities, so no need to build in the logic.
SETT80: IF BUILD_FUSIONX = 0
; Method to configure the hardware to use the T80 CPU instantiated in the FPGA.
;
IN A,(CPUINFO)
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_T80
JP Z,NOT80ERR
;LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
;CALL SETVGAMODE1
LD A, TZSVC_CMD_CPU_SETT80 ; We need to ask the K64F to switch to the T80 as it may involve loading of ROMS.
CALL SVC_CMD
OR A
JP NZ,SETT80ERR
RET
ENDIF ; BUILD_FUSIONX
; Method to configure the hardware to use the original Z80 CPU installed on the tranZPUter board.
;
SETZ80: IF BUILD_FUSIONX = 0
IN A,(CPUINFO)
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
CALL SETVMODE1 ; Turn off VGA mode, return to default MZ video.
LD A, TZSVC_CMD_CPU_SETZ80
CALL SVC_CMD
OR A
JP NZ,SETZ80ERR
RET
ENDIF ; BUILD_FUSIONX
; Method to configure the hardware to use the ZPU Evolution CPU instantiated in the FPGA.
;
SETZPUEVO: IF BUILD_FUSIONX = 0
IN A,(CPUINFO)
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_ZPU_EVO
JP Z,NOZPUERR
LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
CALL SETVGAMODE1
LD A, TZSVC_CMD_CPU_SETZPUEVO ; We need to ask the K64F to switch to the ZPU Evo as it may involve loading of ROMS.
CALL SVC_CMD
OR A
JP NZ,SETZPUERR
HALT ; ZPU will take over so stop the Z80 from further processing.
ENDIF ; BUILD_FUSIONX
;----------------------------------------------
; Hardware Emulation Mode Activation Routines.
;----------------------------------------------
SETMZ80K: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ80K ; We need to ask the K64F to switch to the Sharp MZ80K emulation as it involves loading ROMS.
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ80C: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ80C
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ1200: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ1200
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ80A: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ80A
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ700: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ700
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ1500: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ1500
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ800: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ800
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ80B: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ80B
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ2000: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ2000
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ2200: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ2200
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
SETMZ2500: IF BUILD_FUSIONX = 0
LD D, TZSVC_CMD_EMU_SETMZ2500
JR SETEMUMZ
ENDIF ; BUILD_FUSIONX
;
; General function to determine if the emulator MZ hardware is present and activate it. Activation requires making a request to the
; I/O processor as it needs to load up the correct BIOS etc prior to activating the emulation.
;
SETEMUMZ: IF BUILD_FUSIONX = 0
IN A,(CPUINFO) ; Verify that the FPGA has emuMZ capabilities.
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JR NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_EMU_MZ
JR Z,NOEMUERR
LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
CALL SETVGAMODE1
;
PUSH DE ; Setup the initial video mode based on the required emulation.
LD A,D
SUB TZSVC_CMD_EMU_SETMZ80K
LD L,A
LD H,0
CALL SETVMODE0
POP DE
;
LD A, D ; Load up the required emulation mode.
CALL SVC_CMD
OR A
JR NZ,SETT80ERR
HALT
ENDIF ; BUILD_FUSIONX
; Simple routine to clear screen or attributes.
CLR8: LD BC,00800H
PUSH DE
LD D,A
CLR8_1: LD (HL),D
INC HL
DEC BC
LD A,B
OR C
JR NZ,CLR8_1
POP DE
RET
;
; Message addresses are in Bank2.
;
NOFPGAERR: IF BUILD_FUSIONX = 0
LD DE,MSGNOFPGA
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SETT80ERR: IF BUILD_FUSIONX = 0
LD DE,MSGT80ERR
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SETZ80ERR: IF BUILD_FUSIONX = 0
LD DE,MSGZ80ERR
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SETZPUERR: IF BUILD_FUSIONX = 0
LD DE,MSGZPUERR
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SOFTCPUERR: IF BUILD_FUSIONX = 0
LD DE,MSGNOSOFTCPU
JR BADNUM2
ENDIF ; BUILD_FUSIONX
NOT80ERR: IF BUILD_FUSIONX = 0
LD DE,MSGNOT80CPU
JR BADNUM2
ENDIF ; BUILD_FUSIONX
NOZPUERR: IF BUILD_FUSIONX = 0
LD DE,MSGNOZPUCPU
JR BADNUM2
ENDIF ; BUILD_FUSIONX
NOEMUERR: IF BUILD_FUSIONX = 0
LD DE,MSGNOEMU
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SETFREQERR: LD DE,MSGFREQERR
JR BADNUM2
BADNUMERR: LD DE,MSGBADNUM
BADNUM2: CALL ?PRINTMSG
RET
;-------------------------------------------------------------------------------
; END OF ADDITIONAL TZFS COMMAND METHODS
;-------------------------------------------------------------------------------

320
asm/tzfs_bank4.asm
View File

@@ -1657,326 +1657,6 @@ OPCD_TABLE: DB "#ADC ", 00FH, 000H, 000H, 000H, 000H
; START OF ADDITIONAL TZFS COMMANDS
;-------------------------------------------------------------------------------
; Copy - Source, Destination, Size.
COPYM: CALL READ4HEX ; Start address
JR C,COPYMERR
LD (TMPADR),HL
CALL READ4HEX
JR C,COPYMERR
LD (TMPCNT),HL
CALL READ4HEX
JR C,COPYMERR
PUSH HL
POP BC
LD HL,(TMPCNT)
LD DE,(TMPADR)
LDIR
COPYMERR: RET
; Write to I/O port. 16bit address to BC, 8bit value to A.
WRITEIO: CALL READ4HEX ; Get 16bit I/O port.
JR C,WRITEIOER
PUSH HL ; Swap to BC so B=15:8, C=7:0
POP BC
CALL _2HEX ; Get 8 bit data.
OUT (C),A ; Write 8 bit data to 16bit port.
WRITEIOER: RET
; Read 16bit I/O port value.
READIO: CALL READ4HEX ; Get 16bit I/O port.
JR C,READIOER
PUSH HL ; Swap to BC so B=15:8, C=7:0
POP BC
IN A,(C) ; Get 8bit value from 16bit I/O port.
CALL PRTHX ; Print.
CALL NL
READIOER: RET
; FusionX doesnt yet have the video capabilities, so no need to build in the logic.
IF BUILD_FUSIONX = 0
; Method to set the video mode.
; Param: 0 - Enable FPGA and set to MZ-80K mode.
; 1 - Enable FPGA and set to MZ-80C mode.
; 2 - Enable FPGA and set to MZ-1200 mode.
; 3 - Enable FPGA and set to MZ-80A mode (base mode on MZ-80A hardware).
; 4 - Enable FPGA and set to MZ-700 mode (base mode on MZ-700 hardware).
; 5 - Enable FPGA and set to MZ-1500 mode.
; 6 - Enable FPGA and set to MZ-800 mode.
; 7 - Enable FPGA and set to MZ-80B mode.
; 8 - Enable FPGA and set to MZ-2000 mode.
; 9 - Enable FPGA and set to MZ-2200 mode.
; 10 - Enable FPGA and set to MZ-2500 mode.
; O - Turn off FPGA Video, turn on mainboard video.
SETVMODE: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
PUSH DE ; Preserve DE in case no number given.
POP BC
CALL ConvertStringToNumber ; Convert the input into 0 (disable) or frequency in KHz.
JR NZ,SETVMODEOFF
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 7.
LD A,L
CP 10
JP NC,BADNUMERR
;
SETVMODE0: IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
IN A,(VMCTRL) ; Get current setting.
AND 0F0H ; Clear old mode setting.
OR L ; Add in new setting.
OUT (VMCTRL),A
RLC L ; Shift mode to position for SCRNMODE storage.
RLC L
RLC L
RLC L
LD A,(SCRNMODE) ; Repeat for the screen mode variable, used when resetting or changing display settings.
AND 007H ; Clear video mode setting.
OR L ; Add in new setting.
SET 2, A ; Set flag to indicate video mode override - ie, dont use base machine mode.
SETVMODECLR:SET 1, A ; Ensure flag set so on restart the FPGA video mode is selected.
LD (SCRNMODE),A
LD A, 016H ; Clear the screen so we start from a known position.
CALL PRNT
LD A,071H ; Blue background and white characters.
LD HL,ARAM
CALL CLR8
RET
SETVMODEOFF:LD A,(DE)
CP 'O'
JR Z,SETVMODE1
CP 'o'
JP NZ,BADNUMERR
SETVMODE1: LD A,(SCRNMODE) ; Disable flag to enable FPGA on restart.
RES 1,A
LD (SCRNMODE),A
IN A,(CPLDCFG)
AND ~MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to disable the FPGA video mode.
OUT (CPLDCFG),A
RET
; Method to set the VGA output mode of the external display.
SETVGAMODE: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
CALL ConvertStringToNumber ; Convert the input into 0-3, 0 = off, 1 = 640x480, 2=1024x768, 3=800x600.
JP NZ,BADNUMERR
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 15.
LD A,L
CP 15
JP NC,BADNUMERR
;
;RRC L
;RRC L ; Value to top 2 bits ready to be applied to VGA mode register.
;
SETVGAMODE1:IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
LD A, L ; Add in new setting.
OUT (VMVGAMODE),A
LD (SCRNMODE2), A
JP SETVMODECLR
; Method to set the VGA border colour on the external display.
SETVBORDER: IN A,(CPLDINFO) ; Get configuration of hardware.
BIT 3,A
JP Z,NOFPGAERR ; No hardware so cannot change mode.
CALL ConvertStringToNumber ; Convert the input into 0 - 7, bit 2 = Red, 1 = Green, 0 = Blue.
JP NZ,BADNUMERR
LD A,H
CP 0
JP NZ,BADNUMERR ; Check that the given mode is in range 0 - 7.
LD A,L
CP 7
JP NC,BADNUMERR
;
IN A,(CPLDCFG)
OR MODE_VIDEO_FPGA ; Set the tranZPUter CPLD hardware to enable the FPGA video mode.
OUT (CPLDCFG),A
;
LD A,L
OUT (VMVGATTR),A
RET
ENDIF ; BUILD_FUSIONX
; Method to enable/disable the alternate CPU frequency and change it's values.
;
SETFREQ: CALL ConvertStringToNumber ; Convert the input into 0 (disable) or frequency in KHz.
JP NZ,BADNUMERR
LD (TZSVC_CPU_FREQ),HL ; Set the required frequency in the service structure.
LD A,H
CP L
JR NZ,SETFREQ1
LD A, TZSVC_CMD_CPU_BASEFREQ ; Switch to the base frequency.
JR SETFREQ2
SETFREQ1: LD A, TZSVC_CMD_CPU_ALTFREQ ; Switch to the alternate frequency.
SETFREQ2: CALL SVC_CMD
OR A
JP NZ,SETFREQERR
LD A,H
CP L
RET Z ; If we are disabling the alternate cpu frequency (ie. = 0) exit.
LD A, TZSVC_CMD_CPU_CHGFREQ ; Switch to the base frequency.
CALL SVC_CMD
OR A
JP NZ,SETFREQERR
RET
; FusionX doesnt have the soft CPU capabilities, so no need to build in the logic.
IF BUILD_FUSIONX = 0
; Method to configure the hardware to use the T80 CPU instantiated in the FPGA.
;
SETT80: IN A,(CPUINFO)
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_T80
JP Z,NOT80ERR
;LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
;CALL SETVGAMODE1
LD A, TZSVC_CMD_CPU_SETT80 ; We need to ask the K64F to switch to the T80 as it may involve loading of ROMS.
CALL SVC_CMD
OR A
JP NZ,SETT80ERR
RET
; Method to configure the hardware to use the original Z80 CPU installed on the tranZPUter board.
;
SETZ80: IN A,(CPUINFO)
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
CALL SETVMODE1 ; Turn off VGA mode, return to default MZ video.
LD A, TZSVC_CMD_CPU_SETZ80
CALL SVC_CMD
OR A
JP NZ,SETZ80ERR
RET
; Method to configure the hardware to use the ZPU Evolution CPU instantiated in the FPGA.
;
SETZPUEVO: IN A,(CPUINFO)
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JP NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_ZPU_EVO
JP Z,NOZPUERR
LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
CALL SETVGAMODE1
LD A, TZSVC_CMD_CPU_SETZPUEVO ; We need to ask the K64F to switch to the ZPU Evo as it may involve loading of ROMS.
CALL SVC_CMD
OR A
JP NZ,SETZPUERR
HALT ; ZPU will take over so stop the Z80 from further processing.
;----------------------------------------------
; Hardware Emulation Mode Activation Routines.
;----------------------------------------------
SETMZ80K: LD D, TZSVC_CMD_EMU_SETMZ80K ; We need to ask the K64F to switch to the Sharp MZ80K emulation as it involves loading ROMS.
JR SETEMUMZ
SETMZ80C: LD D, TZSVC_CMD_EMU_SETMZ80C
JR SETEMUMZ
SETMZ1200: LD D, TZSVC_CMD_EMU_SETMZ1200
JR SETEMUMZ
SETMZ80A: LD D, TZSVC_CMD_EMU_SETMZ80A
JR SETEMUMZ
SETMZ700: LD D, TZSVC_CMD_EMU_SETMZ700
JR SETEMUMZ
SETMZ1500: LD D, TZSVC_CMD_EMU_SETMZ1500
JR SETEMUMZ
SETMZ800: LD D, TZSVC_CMD_EMU_SETMZ800
JR SETEMUMZ
SETMZ80B: LD D, TZSVC_CMD_EMU_SETMZ80B
JR SETEMUMZ
SETMZ2000: LD D, TZSVC_CMD_EMU_SETMZ2000
JR SETEMUMZ
SETMZ2200: LD D, TZSVC_CMD_EMU_SETMZ2200
JR SETEMUMZ
SETMZ2500: LD D, TZSVC_CMD_EMU_SETMZ2500
JR SETEMUMZ
;
; General function to determine if the emulator MZ hardware is present and activate it. Activation requires making a request to the
; I/O processor as it needs to load up the correct BIOS etc prior to activating the emulation.
;
SETEMUMZ: IN A,(CPUINFO) ; Verify that the FPGA has emuMZ capabilities.
LD C,A
AND CPUMODE_IS_SOFT_MASK
CP CPUMODE_IS_SOFT_AVAIL
JR NZ,SOFTCPUERR
LD A,C
AND CPUMODE_IS_EMU_MZ
JR Z,NOEMUERR
LD L,VMMODE_VGA_640x480 ; Enable VGA mode for a better display.
CALL SETVGAMODE1
;
PUSH DE ; Setup the initial video mode based on the required emulation.
LD A,D
SUB TZSVC_CMD_EMU_SETMZ80K
LD L,A
LD H,0
CALL SETVMODE0
POP DE
;
LD A, D ; Load up the required emulation mode.
CALL SVC_CMD
OR A
JR NZ,SETT80ERR
HALT
ENDIF ; BUILD_FUSIONX
; Simple routine to clear screen or attributes.
CLR8: LD BC,00800H
PUSH DE
LD D,A
CLR8_1: LD (HL),D
INC HL
DEC BC
LD A,B
OR C
JR NZ,CLR8_1
POP DE
RET
;
; Message addresses are in Bank2.
;
IF BUILD_FUSIONX = 0
NOFPGAERR: LD DE,MSGNOFPGA
JR BADNUM2
SETT80ERR: LD DE,MSGT80ERR
JR BADNUM2
SETZ80ERR: LD DE,MSGZ80ERR
JR BADNUM2
SETZPUERR: LD DE,MSGZPUERR
JR BADNUM2
SOFTCPUERR: LD DE,MSGNOSOFTCPU
JR BADNUM2
NOT80ERR: LD DE,MSGNOT80CPU
JR BADNUM2
NOZPUERR: LD DE,MSGNOZPUCPU
JR BADNUM2
NOEMUERR: LD DE,MSGNOEMU
JR BADNUM2
ENDIF ; BUILD_FUSIONX
SETFREQERR: LD DE,MSGFREQERR
JR BADNUM2
BADNUMERR: LD DE,MSGBADNUM
BADNUM2: CALL ?PRINTMSG
RET
;-------------------------------------------------------------------------------
; END OF ADDITIONAL TZFS COMMANDS
;-------------------------------------------------------------------------------

BIN
roms/tzfs.rom vendored
View File

Binary file not shown.