497 lines
19 KiB
NASM
497 lines
19 KiB
NASM
;--------------------------------------------------------------------------------------------------------
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;-
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;- Name: rfs_bank4.asm
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;- Created: July 2019
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;- Author(s): Philip Smart
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;- Description: Sharp MZ series Rom Filing System.
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;- This assembly language program is written to utilise the banked flashroms added with
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;- the MZ-80A RFS hardware upgrade.
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;-
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;- Credits:
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;- Copyright: (c) 2018-2023 Philip Smart <philip.smart@net2net.org>
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;-
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;- History: July 2019 - Merged 2 utilities to create this compilation.
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; May 2020 - Bank switch changes with release of v2 pcb with coded latch. The coded
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; latch adds additional instruction overhead as the control latches share
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; the same address space as the Flash RAMS thus the extra hardware to
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; only enable the control registers if a fixed number of reads is made
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; into the upper 8 bytes which normally wouldnt occur. Caveat - ensure
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; that no loop instruction is ever placed into EFF8H - EFFFH.
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;-
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;--------------------------------------------------------------------------------------------------------
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;- This source file is free software: you can redistribute it and-or modify
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;- it under the terms of the GNU General Public License as published
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;- by the Free Software Foundation, either version 3 of the License, or
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;- (at your option) any later version.
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;-
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;- This source file is distributed in the hope that it will be useful,
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;- but WITHOUT ANY WARRANTY; without even the implied warranty of
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;- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;- GNU General Public License for more details.
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;-
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;- You should have received a copy of the GNU General Public License
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;- along with this program. If not, see <http://www.gnu.org/licenses/>.
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;--------------------------------------------------------------------------------------------------------
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;===========================================================
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;
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; USER ROM BANK 7 - Memory and timer test utilities.
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;
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;===========================================================
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ORG UROMADDR
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;--------------------------------
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; Common code spanning all banks.
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;--------------------------------
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NOP
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LD B,16 ; If we read the bank control reset register 15 times then this will enable bank control and then the 16th read will reset all bank control registers to default.
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ROMFS7_0: LD A,(BNKCTRLRST)
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DJNZ ROMFS7_0 ; Apply the default number of coded latch reads to enable the bank control registers.
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LD A,BNKCTRLDEF ; Set coded latch, SDCS high, BBMOSI to high and BBCLK to high which enables SDCLK.
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LD (BNKCTRL),A
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NOP
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NOP
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NOP
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XOR A ; We shouldnt arrive here after a reset, if we do, select UROM bank 0
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LD (BNKSELMROM),A
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NOP
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NOP
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NOP
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LD (BNKSELUSER),A ; and start up - ie. SA1510 Monitor - this occurs as User Bank 0 is enabled and the jmp to 0 is coded in it.
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;
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; No mans land... this should have switched to Bank 0 and at this point there is a jump to 00000H.
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JP 00000H ; This is for safety!!
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;------------------------------------------------------------------------------------------
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; Bank switching code, allows a call to code in another bank.
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; This code is duplicated in each bank such that a bank switch doesnt affect logic flow.
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;------------------------------------------------------------------------------------------
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ALIGN_NOPS UROMBSTBL
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;
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BKSW7to0: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK0 ; Required bank to call.
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JR BKSW7_0
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BKSW7to1: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK1 ; Required bank to call.
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JR BKSW7_0
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BKSW7to2: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK2 ; Required bank to call.
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JR BKSW7_0
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BKSW7to3: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK3 ; Required bank to call.
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JR BKSW7_0
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BKSW7to4: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK4 ; Required bank to call.
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JR BKSW7_0
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BKSW7to5: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK5 ; Required bank to call.
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JR BKSW7_0
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BKSW7to6: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK6 ; Required bank to call.
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JR BKSW7_0
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BKSW7to7: PUSH AF
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LD A, ROMBANK7 ; Calling bank (ie. us).
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PUSH AF
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LD A, ROMBANK7 ; Required bank to call.
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;
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BKSW7_0: PUSH HL ; Place function to call on stack
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LD HL, BKSWRET7 ; Place bank switchers return address on stack.
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EX (SP),HL
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LD (TMPSTACKP),SP ; Save the stack pointer as some old code corrupts it.
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LD (BNKSELUSER), A ; Repeat the bank switch B times to enable the bank control register and set its value.
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JP (HL) ; Jump to required function.
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BKSWRET7: POP AF ; Get bank which called us.
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LD (BNKSELUSER), A ; Return to that bank.
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POP AF
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RET
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;-------------------------------------------------------------------------------
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; START OF MEMORY TEST FUNCTIONALITY
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;-------------------------------------------------------------------------------
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MEMTEST: LD B,240 ; Number of loops
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LOOP: LD HL,MEMSTART ; Start of checked memory,
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LD D,0CFh ; End memory check CF00
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LOOP1: LD A,000h
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CP L
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JR NZ,LOOP1b
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CALL PRTHL ; Print HL as 4digit hex.
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LD A,0C4h ; Move cursor left.
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LD E,004h ; 4 times.
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LOOP1a: CALL DPCT
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DEC E
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JR NZ,LOOP1a
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LOOP1b: INC HL
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LD A,H
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CP D ; Have we reached end of memory.
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JR Z,LOOP3 ; Yes, exit.
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LD A,(HL) ; Read memory location under test, ie. 0.
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CPL ; Subtract, ie. FF - A, ie FF - 0 = FF.
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LD (HL),A ; Write it back, ie. FF.
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SUB (HL) ; Subtract written memory value from A, ie. should be 0.
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JR NZ,LOOP2 ; Not zero, we have an error.
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LD A,(HL) ; Reread memory location, ie. FF
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CPL ; Subtract FF - FF
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LD (HL),A ; Write 0
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SUB (HL) ; Subtract 0
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JR Z,LOOP1 ; Loop if the same, ie. 0
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LOOP2: LD A,16h
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CALL PRNT ; Print A
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CALL PRTHX ; Print HL as 4 digit hex.
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CALL PRNTS ; Print space.
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XOR A
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LD (HL),A
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LD A,(HL) ; Get into A the failing bits.
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CALL PRTHX ; Print A as 2 digit hex.
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CALL PRNTS ; Print space.
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LD A,0FFh ; Repeat but first load FF into memory
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LD (HL),A
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LD A,(HL)
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CALL PRTHX ; Print A as 2 digit hex.
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NOP
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JR LOOP4
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LOOP3: CALL PRTHL
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LD DE,OKCHECK
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CALL MSG ; Print check message in DE
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LD A,B ; Print loop count.
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CALL PRTHX
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LD DE,OKMSG
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CALL MSG ; Print ok message in DE
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CALL NL
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DEC B
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JR NZ,LOOP
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LD DE,DONEMSG
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CALL MSG ; Print check message in DE
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JP ST1X
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LOOP4: LD B,09h
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CALL PRNTS ; Print space.
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XOR A ; Zero A
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SCF ; Set Carry
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LOOP5: PUSH AF ; Store A and Flags
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LD (HL),A ; Store 0 to bad location.
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LD A,(HL) ; Read back
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CALL PRTHX ; Print A as 2 digit hex.
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CALL PRNTS ; Print space
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POP AF ; Get back A (ie. 0 + C)
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RLA ; Rotate left A. Bit LSB becomes Carry (ie. 1 first instance), Carry becomes MSB
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DJNZ LOOP5 ; Loop if not zero, ie. print out all bit locations written and read to memory to locate bad bit.
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XOR A ; Zero A, clears flags.
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LD A,80h
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LD B,08h
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LOOP6: PUSH AF ; Repeat above but AND memory location with original A (ie. 80)
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LD C,A ; Basically walk through all the bits to find which one is stuck.
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LD (HL),A
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LD A,(HL)
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AND C
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NOP
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JR Z,LOOP8 ; If zero then print out the bit number
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NOP
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NOP
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LD A,C
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CPL
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LD (HL),A
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LD A,(HL)
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AND C
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JR NZ,LOOP8 ; As above, if the compliment doesnt yield zero, print out the bit number.
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LOOP7: POP AF
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RRCA
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NOP
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DJNZ LOOP6
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JP ST1X
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LOOP8: CALL LETNL ; New line.
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LD DE,BITMSG ; BIT message
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CALL MSG ; Print message in DE
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LD A,B
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DEC A
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CALL PRTHX ; Print A as 2 digit hex, ie. BIT number.
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CALL LETNL ; New line
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LD DE,BANKMSG ; BANK message
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CALL MSG ; Print message in DE
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LD A,H
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CP 50h ; 'P'
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JR NC,LOOP9 ; Work out bank number, 1, 2 or 3.
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LD A,01h
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JR LOOP11
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LOOP9: CP 90h
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JR NC,LOOP10
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LD A,02h
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JR LOOP11
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LOOP10: LD A,03h
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LOOP11: CALL PRTHX ; Print A as 2 digit hex, ie. BANK number.
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JR LOOP7
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DLY1S: PUSH AF
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PUSH BC
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LD C,10
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L0324: CALL DLY12
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DEC C
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JR NZ,L0324
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POP BC
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POP AF
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RET
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;-------------------------------------------------------------------------------
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; END OF MEMORY TEST FUNCTIONALITY
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;-------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------
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; START OF TIMER TEST FUNCTIONALITY
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;-------------------------------------------------------------------------------
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; Test the 8253 Timer, configure it as per the monitor and display the read back values.
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TIMERTST: CALL NL
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LD DE,MSG_TIMERTST
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CALL MSG
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CALL NL
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LD DE,MSG_TIMERVAL
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CALL MSG
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LD A,01h
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LD DE,8000h
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CALL TIMERTST1
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NDE: JP NDE
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JP ST1X
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TIMERTST1: ;DI
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PUSH BC
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PUSH DE
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PUSH HL
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LD (AMPM),A
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LD A,0F0H
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LD (TIMFG),A
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ABCD: LD HL,0A8C0H
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XOR A
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SBC HL,DE
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PUSH HL
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INC HL
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EX DE,HL
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LD HL,CONTF ; Control Register
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LD (HL),0B0H ; 10110000 Control Counter 2 10, Write 2 bytes 11, 000 Interrupt on Terminal Count, 0 16 bit binary
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LD (HL),074H ; 01110100 Control Counter 1 01, Write 2 bytes 11, 010 Rate Generator, 0 16 bit binary
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LD (HL),030H ; 00110100 Control Counter 1 01, Write 2 bytes 11, 010 interrupt on Terminal Count, 0 16 bit binary
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LD HL,CONT2 ; Counter 2
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LD (HL),E
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LD (HL),D
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LD HL,CONT1 ; Counter 1
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LD (HL),00AH
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LD (HL),000H
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LD HL,CONT0 ; Counter 0
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LD (HL),00CH
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LD (HL),0C0H
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; LD HL,CONT2 ; Counter 2
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; LD C,(HL)
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; LD A,(HL)
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; CP D
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; JP NZ,L0323H
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; LD A,C
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; CP E
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; JP Z,CDEF
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;
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L0323H: PUSH AF
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PUSH BC
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PUSH DE
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PUSH HL
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;
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LD HL,CONTF ; Control Register
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LD (HL),080H
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LD HL,CONT2 ; Counter 2
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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CALL PRNTS
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;CALL DLY1S
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;
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LD HL,CONTF ; Control Register
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LD (HL),040H
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LD HL,CONT1 ; Counter 1
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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CALL PRNTS
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;CALL DLY1S
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;
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LD HL,CONTF ; Control Register
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LD (HL),000H
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LD HL,CONT0 ; Counter 0
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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;CALL DLY1S
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;
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LD A,0C4h ; Move cursor left.
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LD E,0Eh ; 4 times.
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L0330: CALL DPCT
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DEC E
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JR NZ,L0330
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;
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; LD C,20
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;L0324: CALL DLY12
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; DEC C
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; JR NZ,L0324
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;
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POP HL
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POP DE
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POP BC
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POP AF
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;
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LD HL,CONT2 ; Counter 2
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LD C,(HL)
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LD A,(HL)
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CP D
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JP NZ,L0323H
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LD A,C
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CP E
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JP NZ,L0323H
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;
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;
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PUSH AF
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PUSH BC
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PUSH DE
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PUSH HL
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CALL NL
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CALL NL
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CALL NL
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LD DE,MSG_TIMERVAL2
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CALL MSG
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POP HL
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POP DE
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POP BC
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POP AF
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;
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CDEF: POP DE
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LD HL,CONT1
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LD (HL),00CH
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LD (HL),07BH
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INC HL
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L0336H: PUSH AF
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PUSH BC
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PUSH DE
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PUSH HL
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;
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LD HL,CONTF ; Control Register
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LD (HL),080H
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LD HL,CONT2 ; Counter 2
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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CALL PRNTS
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CALL DLY1S
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;
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LD HL,CONTF ; Control Register
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LD (HL),040H
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LD HL,CONT1 ; Counter 1
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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CALL PRNTS
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CALL DLY1S
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;
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LD HL,CONTF ; Control Register
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LD (HL),000H
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LD HL,CONT0 ; Counter 0
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LD C,(HL)
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LD A,(HL)
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CALL PRTHX
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LD A,C
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CALL PRTHX
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;
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CALL DLY1S
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;
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LD A,0C4h ; Move cursor left.
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LD E,0Eh ; 4 times.
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L0340: CALL DPCT
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DEC E
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JR NZ,L0340
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;
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POP HL
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POP DE
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POP BC
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POP AF
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LD HL,CONT2 ; Counter 2
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LD C,(HL)
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LD A,(HL)
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CP D
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JR NZ,L0336H
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LD A,C
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CP E
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JR NZ,L0336H
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CALL NL
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LD DE,MSG_TIMERVAL3
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CALL MSG
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POP HL
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POP DE
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POP BC
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;EI
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RET
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;-------------------------------------------------------------------------------
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; END OF TIMER TEST FUNCTIONALITY
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;-------------------------------------------------------------------------------
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;--------------------------------------
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;
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; Message table
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;
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;--------------------------------------
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OKCHECK: DB ", CHECK: ", 0Dh
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OKMSG: DB " OK.", 0Dh
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DONEMSG: DB 11h
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DB "RAM TEST COMPLETE.", 0Dh
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BITMSG: DB " BIT: ", 0Dh
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BANKMSG: DB " BANK: ", 0Dh
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MSG_TIMERTST:
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DB "8253 TIMER TEST", 0Dh, 00h
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MSG_TIMERVAL:
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DB "READ VALUE 1: ", 0Dh, 00h
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MSG_TIMERVAL2:
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DB "READ VALUE 2: ", 0Dh, 00h
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MSG_TIMERVAL3:
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DB "READ DONE.", 0Dh, 00h
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ALIGN 0EFF8h
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ORG 0EFF8h
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DB 0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh
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