diff --git a/software/asm/MSBASIC.asm b/software/asm/MSBASIC.asm index 30774b2..d1e5fca 100644 --- a/software/asm/MSBASIC.asm +++ b/software/asm/MSBASIC.asm @@ -159,14 +159,16 @@ INIT3: ; Setup keyboard buffer control. LD A,080H ; Cursor on (Bit D7=1). LD (FLASHCTL),A - IF BUILD_RFS+BUILD_RFSTZ+BUILD_TZFS > 0 +INIT80CVC: IF BUILD_RFSTZ+BUILD_TZFS > 0 ; Change to 80 character mode. LD HL,DSPCTL ; Setup address of display control register latch. LD A, 128 ; 80 char mode. LD E,(HL) ; Dummy operation to enable latch write via multivibrator. LD (HL), A ENDIF - IF BUILD_RFS = 1 +INIT80CHAR: IF BUILD_RFS = 1 + + IF BUILD_80C = 1 LD A, ROMBANK1 ; Switch to 80char monitor SA-1510. LD (ROMBK1),A LD (BNKSELMROM),A @@ -174,7 +176,34 @@ INIT3: ; Setup keyboard buffer control. LD (SCRNMODE), A LD A, 0FFH LD (SPAGE), A + + ; Change to 80 character mode. + LD HL,DSPCTL ; Setup address of display control register latch. + LD A, 128 ; 80 char mode. + LD E,(HL) ; Dummy operation to enable latch write via multivibrator. + LD (HL), A + ELSE + LD A, ROMBANK0 ; Switch to 40char monitor SA-1510. + LD (ROMBK1),A + LD (BNKSELMROM),A + LD A, 40 ; Set BASIC to 40 column width. + LD (INITABW),A + XOR A ; As we call RFS for SD services, specifically DIR listing, we have to ensure RFS is configured for 40 column output mode. + LD (SCRNMODE), A + LD A, 0FFH + LD (SPAGE), A + ENDIF ENDIF + ; +INIT80END: LD A,000H ; Clear the screen buffer. + LD HL,SCRN + CALL CLR8 + LD A,071H ; Blue background, white characters in colour mode. Bit 7 is set as a write to bit 7 @ DFFFH selects 80Char mode. + LD HL,ARAM + CALL CLR8 + ; + LD A,COLW + LD (LWIDTH),A ; Setup the initial terminal width. CALL MLDSP CALL BEL ; Beep to indicate startup - for cases where screen is slow to startup. LD A,0FFH @@ -195,17 +224,17 @@ INITANSI: IF INCLUDE_ANSITERM = 1 ; If the ansi terminal emulator is buil LD (KEYPF),A ; MEMSW1: IF BUILD_TZFS+BUILD_RFSTZ > 0 - LD A,TZMM_MZ700_2 ; Enable the full 64K memory range before starting BASIC initialisation. - OUT (MMCFG),A + LD A,TZMM_MZ700_2 ; Enable the full 64K memory range before starting BASIC initialisation. + OUT (MMCFG),A ENDIF ; Clear memory LD HL,WRKSPC MEMSZ1: IF BUILD_MZ80A+BUILD_RFS > 0 - LD BC,MAXMEM - WRKSPC ; Clear to top of physical RAM. + LD BC,MAXMEM - WRKSPC ; Clear to top of physical RAM. ENDIF MEMSZ2: IF BUILD_TZFS+BUILD_RFSTZ > 0 - LD BC,10000H - WRKSPC ; Clear to top of physical RAM. + LD BC,10000H - WRKSPC ; Clear to top of physical RAM. ENDIF LD E,00H INIT4: LD (HL),E @@ -663,7 +692,11 @@ INITAB: JP WARMST ; Warm start jump DB 1 ; POS (x) number (1) INITABW: DB COLW ; Terminal width - DB 28 ; Width for commas (3 columns) + IF BUILD_80C = 1 + DB 28 ; Width for commas (3 columns) + ELSE + DB 14 ; Width for commas (3 columns) + ENDIF DB 0 ; No nulls after input bytes DB 0 ; Output enabled (^O off) @@ -1103,7 +1136,7 @@ TTYLIN: LD HL,BUFFER ; Get a line by character MORINP: CALL CLOTST ; Get character and test ^O LD C,A ; Save character in C CP DELETE ; Delete character? - JP Z,DELCHR ;DODEL ; Yes - Process it + JP Z,DELCHR ;DODEL ; Yes - Process it LD A,(NULFLG) ; Get null flag OR A ; Test null flag status JP Z,PROCES ; Reset - Process character @@ -6176,7 +6209,7 @@ KTBLC: ; CTRL ON ;------------------------------------------------------------------------------- ; SERVICE COMMAND METHODS ;------------------------------------------------------------------------------- - IF BUILD_TZFS = 1 +SVC_CMD: IF BUILD_TZFS = 1 ; Method to send a command to the I/O processor and verify it is being acted upon. ; THe method, after sending the command, polls the service structure result to see if the I/O processor has updated it. If it doesnt update the result @@ -6189,7 +6222,7 @@ KTBLC: ; CTRL ON ; A = 0 - Success, command being processed. ; A = 1 - Failure, no contact with I/O processor. ; A = 2 - Failure, no result from I/O processor, it could have crashed or SD card removed! -SVC_CMD: PUSH BC + PUSH BC LD (TZSVCCMD), A ; Load up the command into the service record. LD A,TZSVC_STATUS_REQUEST LD (TZSVCRESULT),A ; Set the service structure result to REQUEST, if this changes then the K64 is processing. @@ -6856,10 +6889,10 @@ L098C: SUB 00AH ; Delete a character on screen. DELETECHR: LD A,0C7H CALL DPCT - JR PRNT1 + JP PRNT1 NEWLINE: CALL NL - JR PRNT1 + JP PRNT1 ; ; Function to disable the cursor display. @@ -6951,7 +6984,7 @@ MEMSW4: IF BUILD_TZFS+BUILD_RFSTZ > 0 CP 07FH JR Z,DELETECHR CP BACKS - JR Z,DELETECHR + JP Z,DELETECHR PUSH BC LD C,A LD B,A @@ -7157,9 +7190,15 @@ CLRS: LD HL,MANG LD B,01BH CALL CLER LD HL,SCRN - PUSH HL + ;PUSH HL CALL CLR8Z - POP HL + ;POP HL + IF BUILD_80C = 0 + LD A,071H ; Black background, white characters. Bit 7 is clear as a write to bit 7 @ DFFFH selects 40Char mode. + ELSE + LD A,071H ; Blue background, white characters in colour mode. Bit 7 is set as a write to bit 7 @ DFFFH selects 80Char mode. + ENDIF + CALL CLR8 ; D800H-DFFFH CLEAR CLRS1: LD A,(SCLDSP) HOM0: LD HL,00000H JP CURS3 @@ -7669,7 +7708,7 @@ WTAP3: POP HL LD BC,00080H LD HL,IBUFE RD1: DI -MEMSWRT0: IF BUILD_TZFS+BUILD_RFS > 0 +MEMSWRT0: IF BUILD_TZFS+BUILD_RFSTZ > 0 LD (SPISRSAVE),SP ; Share the interrupt stack whilst accessing hardware as the BASIC stack goes out of scope. LD SP,ISRSTACK ; Interrupts are disabled so we can safely use this stack. LD A,TZMM_MZ700_0 ; We meed to be in memory mode 10 to access the tape hardware. @@ -8778,7 +8817,7 @@ REBOOT80A: IF BUILD_MZ80A = 1 ENDIF ; For RFS we need to switch back to the 40 char monitor. -REBOOTRFS: IF BUILD_RFS = 1 +REBOOTRFS: IF BUILD_RFS+BUILD_80C = 2 LD A, ROMBANK0 ; Switch to 40Char monitor. LD (ROMBK1),A LD (BNKSELMROM),A @@ -8795,22 +8834,22 @@ REBOOTRFS: IF BUILD_RFS = 1 BFREE: DB " Bytes free",CR,LF,0,0 SIGNON: IF BUILD_TZFS = 1 - DB "MZ-80A BASIC (TZFS) Ver 4.7b",CR,LF + DB "Microsoft Basic (TZFS) Ver 4.7b",CR,LF DB "Copyright ",40,"C",41 DB " 1978 by Microsoft",CR,LF,0,0 ENDIF IF BUILD_RFSTZ = 1 - DB "MZ-80A BASIC (RFS TZ) Ver 4.7b",CR,LF + DB "Microsoft Basic (RFS TZ) Ver 4.7b",CR,LF DB "Copyright ",40,"C",41 DB " 1978 by Microsoft",CR,LF,0,0 ENDIF IF BUILD_RFS = 1 - DB "MZ-80A BASIC (RFS) Ver 4.7b",CR,LF + DB "Microsoft Basic (RFS) Ver 4.7b",CR,LF DB "Copyright ",40,"C",41 DB " 1978 by Microsoft",CR,LF,0,0 ENDIF IF BUILD_MZ80A = 1 - DB "MZ-80A BASIC Ver 4.7b",CR,LF + DB "Microsoft Basic (MZ-80A) Ver 4.7b",CR,LF DB "Copyright ",40,"C",41 DB " 1978 by Microsoft",CR,LF,0,0 ENDIF @@ -9012,21 +9051,22 @@ CODEEND: ; For TZFS builds the image needs to be relocated from 0x1200 to 0x0000 on startup after switching the memory mode. RELOCSTART: IF BUILD_TZFS+BUILD_RFSTZ > 0 - ORG $ + 1200H + ORG $ + 1200H - ; Switch memory. -RELOC: LD A, TZMM_MZ700_0 ; Switch to the MZ700 memory map where the lower 4K 0000:0FFF is in block 6, we therefore preserve the Monitor for exit. - OUT (MMCFG),A + ; Switch memory. +RELOC: LD A, TZMM_MZ700_0 ; Switch to the MZ700 memory map where the lower 4K 0000:0FFF is in block 6, we therefore preserve the Monitor for exit. + OUT (MMCFG),A - ; Move the image down and start. - LD DE, 0000H - LD HL, 01200H - LD BC, CODEEND - CODESTART - LDIR - JP 0000H + ; Move the image down and start. + LD DE, 0000H + LD HL, 01200H + LD BC, CODEEND - CODESTART + LDIR + JP 0000H + ENDIF ; For RFS builds a two stage relocation is needed, a) relocate to tranzputer RAM, b) run the TZFS relocation code. -RELOC_RFS: IF BUILD_RFS = 1 +RELOC_RFS: IF BUILD_RFSTZ = 1 ; Switch memory. RELOCRFS: LD A, TZMM_BOOT ; Go to boot mode, copy the relocation code to EC80H and execute. @@ -9038,44 +9078,44 @@ RELOCRFS: LD A, TZMM_BOOT ; Go to LD BC, RELOCRFS2END - RELOCRFS2 LDIR JP 0EC80H ; Run the relocation code. - - ENDIF + ENDIF RELOCEND: -RELOCRFS2: ; Move the image down into tranZPUter memory and then start the real relocation. - LD HL, 01200H - LD BC, (CODEEND - CODESTART) + (RELOCEND - RELOC) ; Size of program. +RELOCRFS2: IF BUILD_TZFS+BUILD_RFSTZ > 0 + ; Move the image down into tranZPUter memory and then start the real relocation. + LD HL, 01200H + LD BC, (CODEEND - CODESTART) + (RELOCEND - RELOC) ; Size of program. - ; Fetch a byte from main DRAM and write it into Bank 0 same location. -RELOCRFS2_1:LD A,TZMM_BOOT - OUT (MMCFG),A - LD A,(HL) - ; - EX AF,AF' - LD A,TZMM_TZFS - OUT (MMCFG),A - EX AF,AF' - ; - LD (HL),A - INC HL - DEC BC - LD A,B - OR C - JR NZ, RELOCRFS2_1 - ; - LD DE, 00000H ; Copy the reboot handler into Bank 0 at 00000H. - LD HL, 0EC80H + (REBOOTRFS - RELOCRFS2) - LD BC, RELOCRFS2END - REBOOTRFS - LDIR - ; - JP RELOC ; Jump into the original TZFS relocation code. + ; Fetch a byte from main DRAM and write it into Bank 0 same location. +RELOCRFS2_1: LD A,TZMM_BOOT + OUT (MMCFG),A + LD A,(HL) + ; + EX AF,AF' + LD A,TZMM_TZFS + OUT (MMCFG),A + EX AF,AF' + ; + LD (HL),A + INC HL + DEC BC + LD A,B + OR C + JR NZ, RELOCRFS2_1 + ; + LD DE, 00000H ; Copy the reboot handler into Bank 0 at 00000H. + LD HL, 0EC80H + (REBOOTTZRFS - RELOCRFS2) + LD BC, RELOCRFS2END - REBOOTTZRFS + LDIR + ; + JP RELOC ; Jump into the original TZFS relocation code. - ; Reboot handler for RFS mode. This code is transferred into RAM bank 0 at 0000H as this is not used for BASIC - ; and executed when a return to the Monitor ROM is needed. Location 004AH in the Monitor ROM is the startup vector. -REBOOTRFS: ALIGN_NOPS $ + 04AH - 4 -REBOOTRFS1: LD A,TZMM_ORIG - OUT (MMCFG),A - JP 00000H + ; Reboot handler for TZ/RFS mode. This code is transferred into RAM bank 0 at 0000H as this is not used for BASIC + ; and executed when a return to the Monitor ROM is needed. Location 004AH in the Monitor ROM is the startup vector. +REBOOTTZRFS: ALIGN_NOPS $ + 04AH - 4 +REBOOTTZRFS1: LD A,TZMM_ORIG + OUT (MMCFG),A + JP 00000H RELOCRFS2END:ENDIF @@ -9130,7 +9170,7 @@ TMCNT: DS virtual 2 ; TAPE SUMDT: DS virtual 2 ; CHECK SUM DATA CSMDT: DS virtual 2 ; FOR COMPARE SUM DATA AMPM: DS virtual 1 ; AMPM DATA -TIMFG: DS virtual 1 ; TIME FLAG +TIMFG: DS virtual 1 ; TIME FLAG SWRK: DS virtual 1 ; KEY SOUND FLAG TEMPW: DS virtual 1 ; TEMPO WORK ONTYO: DS virtual 1 ; ONTYO WORK @@ -9141,7 +9181,7 @@ RATIO: DS virtual 2 ; ONPU IF BUILD_MZ80A+BUILD_RFS > 0 ORG MONVARSTRT ENDIF - + DSPXYADDR: DS virtual 2 ; Address of last known position. FLASHCTL: DS virtual 1 ; CURSOR FLASH CONTROL. BIT 0 = Cursor On/Off, BIT 1 = Cursor displayed. diff --git a/software/asm/cbios.asm b/software/asm/cbios.asm index b07deb8..231bc3b 100644 --- a/software/asm/cbios.asm +++ b/software/asm/cbios.asm @@ -399,7 +399,7 @@ STRT4: CALL ?DSKINIT ; Initi ; STRT5: LD DE,CBIOSIGNEND ; Terminate the signon message which now includes list of drives detected. CALL MONPRTSTR - CALL ?NL + ;CALL ?NL ; ; Allocate DPB according to drives detected in priorty, SD,FDC ; @@ -917,50 +917,30 @@ ALLOC2: LD (RSFLAG), A ; rsfla ; During normal operations the control registers are enabled. When access is needed to the full User ROM space, ie for drive read/write then the registers are disabled after ; setting the correct bank. The upper bits of the User ROM address space (ie. bits 20:19 which select the device) are set to by the ROMCTL variable. ; -;SELUSRBNK: DI -; EXX -; EX AF,AF' -; LD A,(ROMCTL) ; Get current setting for the coded latch, ie. number of reads needed to enable it. -; LD C,A -; RRA -; RRA -; CPL -; AND 00FH ; Preserve bits 3-1, bit 0 is always 0 on the 74HCT191 latch. -; LD B,A ; Set value to B for loop. -; LD A,(BNKCTRLDIS) ; Do a reset for the case where the above read enabled the latch, possible if external programs are reading/writing the latch area. -; LD A,(BNKCTRL) ; Sample latch at start to detect change. -; LD E,A -;SELUSRBNK1: LD A,(BNKCTRL) ; Read the latch and compare with sample. Either we reach the count limit or the read differs indicating latch control. -; CP E -; JR NZ,SELUSRBNK2 -; DJNZ SELUSRBNK1 -;SELUSRBNK2: LD A,C -; LD (BNKCTRL),A -; EX AF,AF' -; LD (BNKSELUSER),A ; Select the required bank. -; EXX -; JR C,SELUSRBNK3 ; If Carry is set by caller then leave the control registers active. -; LD (BNKCTRLDIS),A ; Disable the control registers, value of A is not important. -;SELUSRBNK3: EI -; RET -SELUSRBNK: PUSH BC +SELUSRBNK: DI + PUSH BC PUSH AF ; Reset to a known state to allow for spurious read/writes to control area clocking the up counter. - LD B,15 + LD B,16 SELUSRBNK0: LD A,(BNKCTRLDIS) DJNZ SELUSRBNK0 ; Now loop for the correct up counter required to enable the latches. LD B,15 ; Set value to B for loop. -SELUSRBNK1: LD A,(BNKCTRL) ; Read the latch and compare with sample. Either we reach the count limit or the read differs indicating latch control. + LD A,(BNKCTRL) + LD C,A +SELUSRBNK1: CP C + JR NZ,SELUSRBNK2 + LD A,(BNKCTRL) ; Read the latch and compare with sample. Either we reach the count limit or the read differs indicating latch control. DJNZ SELUSRBNK1 - POP AF +SELUSRBNK2: POP AF POP BC LD (BNKSELUSER),A ; Select the required bank. LD A,(ROMCTL) LD (BNKCTRL),A - JR C,SELUSRBNK2 + JR C,SELUSRBNK3 LD (BNKCTRLDIS),A ; Disable the control registers, value of A is not important. -SELUSRBNK2: RET +SELUSRBNK3: EI + RET ; Helper method to set up a Disk Parameter Block. @@ -1590,7 +1570,8 @@ UROMLOAD: PUSH BC LD C,0 ADD HL,BC LD BC, MZFHDRNCSZ -LROMLOAD0: LD A,(HL) ; Issues with LDIR and a signal artifact from the mainboard, so manual copy. +LROMLOAD0: LD A,(BNKCTRLDIS) + LD A,(HL) ; Issues with LDIR and a signal artifact from the mainboard, so manual copy. INC HL LD (DE),A INC DE @@ -1653,7 +1634,7 @@ LROMLOAD4: LD (TMPSIZE), HL ; HL co OR C JR Z, LROMLOAD8 -LROMLOAD9: LD (BNKCTRLDIS),A ; There exists an issue with using the mainboard decoder signal which I havent quite understood, random activation of the upcounter occurs which appears to be the refresh circuit. +LROMLOAD9: LD (BNKCTRLDIS),A ; There exists an issue with using the mainboard decoder signal which I havent quite understood, random activation of the upcounter occurs which appears to be the refresh circuit. LD A,(HL) ; Issues with LDIR and a signal artifact from the mainboard, so manual copy. INC HL LD (DE),A @@ -2469,7 +2450,7 @@ KTBLC: ; CTRL ON CBIOSSIGNON:IF BUILD_80C = 1 DB "** CBIOS v1.25, (C) P.D. Smart, 2019-21. Drives:", NUL ELSE - DB "*CBIOS v1.25, (C) P.D. Smart, 2019-21.*", CR + DB "CBIOS v1.25, (C) P.D. Smart, 2019-21. " DB "Drives:", NUL ENDIF CBIOSIGNEND:IF BUILD_80C = 1 diff --git a/software/asm/cbios_bank1.asm b/software/asm/cbios_bank1.asm index 21bd6f1..c730c56 100644 --- a/software/asm/cbios_bank1.asm +++ b/software/asm/cbios_bank1.asm @@ -51,7 +51,7 @@ LD B,16 ; If we read the bank control reset register 15 times then this will enable bank control and then the 16th read will reset all bank control registers to default. CBIOS1_0: LD A,(BNKCTRLRST) DJNZ CBIOS1_0 ; Apply the default number of coded latch reads to enable the bank control registers. - LD A,BNKCTRLDEF ; Set coded latch, SDCS high, BBMOSI to high and BBCLK to high which enables SDCLK. +CBIOS1_1: LD A,BNKCTRLDEF ; Set coded latch, SDCS high, BBMOSI to high and BBCLK to high which enables SDCLK. LD (BNKCTRL),A NOP NOP @@ -87,7 +87,7 @@ CBIOS1_0: LD A,(BNKCTRLRST) ; Method to reboot the machine into startup mode, ie. Monitor at MROM Bank 0, UROM at Bank 0. ?REBOOT: LD A,(MEMSWR) ; Switch memory to power up state, ie. Monitor ROM at 00000H - JP UROMADDR ; Now run the code at the bank start which switches to bank 0, intitialises and then calls 00000H + JP CBIOS1_1 ; Now run the code at the bank start which switches to bank 0, intitialises and then calls 00000H ;------------------------------------------------------------------------------- ; START OF AUDIO CONTROLLER FUNCTIONALITY @@ -437,8 +437,10 @@ GETKY2: LD A,(KEYCOUNT) ; No ke JR ?PRCKYX ?PRCKY7: CP BREAKKEY ; Break key processing. JR NZ,?PRCKY8 - -?PRCKY8: + JR ?PRCKYE +?PRCKY8: CP DELETE + JR NZ,?PRCKYX + LD A,BACKS ; Map DELETE to BACKSPACE, BACKSPACE is Rubout, DELETE is echo in CPM. ?PRCKYX: ?PRCKYE: POP HL diff --git a/software/asm/include/CPM_Definitions.asm b/software/asm/include/CPM_Definitions.asm index ba95d6e..07b92ab 100644 --- a/software/asm/include/CPM_Definitions.asm +++ b/software/asm/include/CPM_Definitions.asm @@ -39,9 +39,6 @@ HW_SPI_ENA EQU 1 ; Set t SW_SPI_ENA EQU 0 ; Set to 1 if software SPI is present on the RFS PCB v2 board. PP_SPI_ENA EQU 0 ; Set to 1 if using the SPI interface via the Parallel Port, ie. for RFS PCB v1 which doesnt have SPI onboard. -;----------------------------------------------- -; Configurable settings. -;----------------------------------------------- ; Build time options, only set to '1' to build, '0' to disable, only 1 can be set to '1'. ; IF BUILD_VERSION = 0 BUILD_80C EQU 1 ; Build for an MZ-80A with a 40/80 column card. @@ -52,6 +49,9 @@ BUILD_40C EQU 0 ; Build ;BUILD_40C EQU 1 ; Build for a standard 40 column MZ-80A. ; ENDIF +;----------------------------------------------- +; Configurable settings. +;----------------------------------------------- MAXRDRETRY EQU 002h MAXWRRETRY EQU 002h BLKSIZ EQU 4096 ; CP/M allocation size @@ -65,11 +65,11 @@ WRDIR EQU 1 ; write WRUAL EQU 2 ; write to unallocated TMRTICKINTV EQU 5 ; Number of 0.010mSec ticks per interrupt, ie. resolution of RTC. MTROFFMSECS EQU 100 ; Time from last access to motor being switched off in seconds in TMRTICKINTV ticks. -; IF BUILD_80C = 1 + IF BUILD_80C = 1 COLW EQU 80 ; Width of the display screen (ie. columns). -; ELSE -;COLW EQU 40 ; Width of the display screen (ie. columns). -; ENDIF + ELSE +COLW EQU 40 ; Width of the display screen (ie. columns). + ENDIF ROW EQU 25 ; Number of rows on display screen. SCRNSZ EQU COLW * ROW ; Total size, in bytes, of the screen display area. SCRLW EQU COLW / 8 ; Number of 8 byte regions in a line for hardware scroll. diff --git a/software/asm/include/MSBASIC_Definitions.asm b/software/asm/include/MSBASIC_Definitions.asm index 7d53db6..26ae7ef 100644 --- a/software/asm/include/MSBASIC_Definitions.asm +++ b/software/asm/include/MSBASIC_Definitions.asm @@ -49,36 +49,39 @@ BUILD_MZ80A EQU 1 ; Build BUILD_RFS EQU 0 ; Build for standard RFS with SD enhancements. BUILD_RFSTZ EQU 0 ; Build for RFS where the tranZPUter board is available without the K64F and running under RFS. BUILD_TZFS EQU 0 ; Build for TZFS where extended memory is available. +BUILD_80C EQU 0 +INCLUDE_ANSITERM EQU 1 ; Include the Ansi terminal emulation processor in the build. ENDIF IF BUILD_VERSION = 1 BUILD_MZ80A EQU 0 BUILD_RFS EQU 1 BUILD_RFSTZ EQU 0 BUILD_TZFS EQU 0 +BUILD_80C EQU 1 +INCLUDE_ANSITERM EQU 1 ; Include the Ansi terminal emulation processor in the build. ENDIF IF BUILD_VERSION = 2 BUILD_MZ80A EQU 0 BUILD_RFS EQU 0 BUILD_RFSTZ EQU 1 BUILD_TZFS EQU 0 +BUILD_80C EQU 1 +INCLUDE_ANSITERM EQU 1 ; Include the Ansi terminal emulation processor in the build. ENDIF IF BUILD_VERSION = 3 BUILD_MZ80A EQU 0 BUILD_RFS EQU 0 BUILD_RFSTZ EQU 0 BUILD_TZFS EQU 1 +BUILD_80C EQU 1 +INCLUDE_ANSITERM EQU 1 ; Include the Ansi terminal emulation processor in the build. ENDIF -INCLUDE_ANSITERM EQU 1 ; Include the Ansi terminal emulation processor in the build. - -TMRTICKINTV EQU 5 ; Number of 0.010mSec ticks per interrupt, ie. resolution of RTC. - IF BUILD_MZ80A = 1 -COLW: EQU 40 ; Width of the display screen (ie. columns). -MODE80C: EQU 0 - ENDIF - IF BUILD_RFS+BUILD_RFSTZ+BUILD_TZFS > 0 + IF BUILD_80C = 1 COLW: EQU 80 ; Width of the display screen (ie. columns). -MODE80C: EQU 1 + ELSE +COLW: EQU 40 ; Width of the display screen (ie. columns). ENDIF +TMRTICKINTV EQU 5 ; Number of 0.010mSec ticks per interrupt, ie. resolution of RTC. ROW: EQU 25 ; Number of rows on display screen. SCRNSZ: EQU COLW * ROW ; Total size, in bytes, of the screen display area. SCRLW: EQU COLW / 8 ; Number of 8 byte regions in a line for hardware scroll. @@ -101,7 +104,6 @@ CTAPELOAD EQU 2 TAPESAVE EQU 3 CTAPESAVE EQU 4 - ; Debugging ENADEBUG EQU 0 ; Enable debugging logic, 1 = enable, 0 = disable @@ -259,6 +261,7 @@ CTRL_Y EQU 019H CTRL_Z EQU 01AH ESC EQU 01BH CTRL_SLASH EQU 01CH +CTRL_LB EQU 01BH CTRL_RB EQU 01DH CTRL_CAPPA EQU 01EH CTRL_UNDSCR EQU 01FH @@ -273,6 +276,9 @@ INSERT EQU 0F6H CLRKEY EQU 0F7H HOMEKEY EQU 0F8H BREAKKEY EQU 0FBH +GRAPHKEY EQU 0FCH +ALPHAKEY EQU 0FDH + ;----------------------------------------------- ; Rom File System variable addresses. @@ -357,11 +363,17 @@ TZMM_TZFS4 EQU 005H ; TZFS TZMM_CPM EQU 006H ; CPM main memory configuration, all memory on the tranZPUter board, 64K block 4 selected. Special case for F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard. TZMM_CPM2 EQU 007H ; CPM main memory configuration, F000-FFFF are on the tranZPUter board in block 4, 0040-CFFF and E800-EFFF are in block 5, mainboard for D000-DFFF (video), E000-E800 (Memory control) selected. ; Special case for 0000:003F (interrupt vectors) which resides in block 4, F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard. +TZMM_COMPAT EQU 008H ; Original mode but with main DRAM in Bank 0 to allow bootstrapping of programs from other machines such as the MZ700. +TZMM_HOSTACCESS EQU 009H ; Mode to allow code running in Bank 0, address E800:FFFF to access host memory. Monitor ROM 0000-0FFF and Main DRAM 0x1000-0xD000, video and memory mapped I/O are on the host machine, User/Floppy ROM E800-FFFF are in tranZPUter memory. TZMM_MZ700_0 EQU 00AH ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the mainboard. TZMM_MZ700_1 EQU 00BH ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6. TZMM_MZ700_2 EQU 00CH ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6. TZMM_MZ700_3 EQU 00DH ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible. TZMM_MZ700_4 EQU 00EH ; MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible. +TZMM_MZ800 EQU 00FH ; MZ800 Mode - Tracks original hardware mode offering MZ700/MZ800 configurations. +TZMM_FPGA EQU 015H ; Open up access for the K64F to the FPGA resources such as memory. All other access to RAM or mainboard is blocked. +TZMM_TZPUM EQU 016H ; Everything in on mainboard, no access to tranZPUter memory. +TZMM_TZPU EQU 017H ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected. TZMM_TZPU0 EQU 018H ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected. TZMM_TZPU1 EQU 019H ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 1 is selected. TZMM_TZPU2 EQU 01AH ; Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 2 is selected. @@ -446,6 +458,8 @@ TZSVC_CMD_WRITESDDRIVE: EQU 33H ; Servi TZSVC_CMD_CPU_BASEFREQ EQU 40H ; Service command to switch to the mainboard frequency. TZSVC_CMD_CPU_ALTFREQ EQU 41H ; Service command to switch to the alternate frequency provided by the K64F. TZSVC_CMD_CPU_CHGFREQ EQU 42H ; Service command to set the alternate frequency in hertz. +TZSVC_CMD_CPU_SETZ80 EQU 50H ; Service command to switch to the external Z80 hard cpu. +TZSVC_CMD_CPU_SETT80 EQU 51H ; Service command to switch to the internal T80 soft cpu. TZSVC_STATUS_OK: EQU 000H ; Flag to indicate the K64F processing completed successfully. TZSVC_STATUS_REQUEST: EQU 0FEH ; Flag to indicate the Z80 has made a request to the K64F. TZSVC_STATUS_PROCESSING:EQU 0FFH ; Flag to indicate the K64F is processing a command. diff --git a/software/asm/rfs.asm b/software/asm/rfs.asm index 1615488..e953b2c 100644 --- a/software/asm/rfs.asm +++ b/software/asm/rfs.asm @@ -175,10 +175,16 @@ ROMFS_3: LD (BNKSELMROM),A ; start ; Replacement command processor in place of the SA1510 command processor. ; MONITOR: IN A,(CPLDINFO) ; See if a tranZPUter board is present. - CP 0A0H - JR NC,CHKTZ1 + AND 0E7H ; Mask out the CPLD Version and host HW. + LD C,A + CP 020H ; Upper bits specify the version, should be at least 1. + JR C,CHKTZ1 + AND 007H ; Get Hardware, should be an MZ-80A for RFS. + CP MODE_MZ80A + LD A,C + JR Z,CHKTZ1 XOR A -CHKTZ1: AND 00FH +CHKTZ1: AND 0E0H LD (TZPU), A ; Flag = 0 if no tranZPUter present otherwise contains version (1 - 15). LD HL,DSPCTL ; Setup address of display control register latch. ; diff --git a/software/asm/rfs_bank6.asm b/software/asm/rfs_bank6.asm index 4eba676..dfc22f8 100644 --- a/software/asm/rfs_bank6.asm +++ b/software/asm/rfs_bank6.asm @@ -451,8 +451,8 @@ ATBL: DB 0CCH ; NUL '\0' (null character) ; Message table ; ;-------------------------------------- -MSGSON: DB "+ RFS ", 0ABh, "2.1 **", 00DH, 000H ; Version 2.0-> as we are now using the v2.x PCB with 4 devices on-board -MSGSONTZ: DB "+ TZ+RFS ", 0ABh, "2.0 **", 00DH, 000H ; Version 2.0 with version 2.1+ of tranZPUter board installed. +MSGSON: DB "+ RFS ", 0ABh, "2.1 **", 00DH, 000H ; Version 2.x-> as we are now using the v2.x PCB with 4 devices on-board +MSGSONTZ: DB "+ TZ+RFS ", 0ABh, "2.1 **", 00DH, 000H ; Version 2.x with version 2.1+ of tranZPUter board installed. MSGNOTFND: DB "Not Found", 00DH, 000H MSGRDIRLST: DB "ROM Directory:", 00DH, 000H MSGTRM: DB 00DH, 000H diff --git a/software/build.sh b/software/build.sh index f4807b0..8f1a00a 100755 --- a/software/build.sh +++ b/software/build.sh @@ -27,7 +27,7 @@ if [ $? != 0 ]; then fi # Only needed if the program source tree changes, takes too long to run on every build! -if [ ${PROCESS_MFZ_FILES} != 1 ]; then +if [[ ${PROCESS_MFZ_FILES} -eq 1 ]]; then tools/processMZFfiles.sh if [ $? != 0 ]; then echo "Failed to process MZF files into sectored variants...." diff --git a/software/roms/MROM_256.bin b/software/roms/MROM_256.bin index 229a998..ff9f3a0 100644 Binary files a/software/roms/MROM_256.bin and b/software/roms/MROM_256.bin differ diff --git a/software/roms/USER_ROM_256.bin b/software/roms/USER_ROM_256.bin index 84c1ae3..1cf625b 100644 Binary files a/software/roms/USER_ROM_256.bin and b/software/roms/USER_ROM_256.bin differ diff --git a/software/roms/cbios.rom b/software/roms/cbios.rom index 09d9346..4a32a6c 100644 Binary files a/software/roms/cbios.rom and b/software/roms/cbios.rom differ diff --git a/software/roms/cbios_bank1.rom b/software/roms/cbios_bank1.rom index 70b6340..ca90b79 100644 Binary files a/software/roms/cbios_bank1.rom and b/software/roms/cbios_bank1.rom differ diff --git a/software/roms/rfs.rom b/software/roms/rfs.rom index b87df14..ee786d1 100644 Binary files a/software/roms/rfs.rom and b/software/roms/rfs.rom differ diff --git a/software/tools/assemble_roms.sh b/software/tools/assemble_roms.sh index 47e073b..8050f44 100755 --- a/software/tools/assemble_roms.sh +++ b/software/tools/assemble_roms.sh @@ -12,6 +12,7 @@ ## Copyright: (c) 2018-21 Philip Smart ## ## History: August 2018 - Initial script written. +## March 2021 - Updated to compile different versions of Microsoft BASIC. ## ######################################################################################################### ## This source file is free software: you can redistribute it and#or modify