;
; SYSLIB Module Name:  SPAUSE
; Author:  Richard Conn
; SYSLIB Version Number:  2.0
; Module Version Number:  1.0
; Module Entry Points:
;	PAUSE
; Module External References:
;	None
;

;
;  PAUSE -- Pause N 10ths of a Second
;	PAUSE will simply enter a delay loop for N 10ths of a Second.
;
;	Input Parameters:  HL = Number of 10ths of a Second to Pause
;			B = Processor CLock Speed (in MHz)
;	Output Parameters:  None
;	Registers Affected:  None
;	SYSLIB Routines Called:  None
;	Special Error Conditions:  None
;

;
;  EQUATES
;
BOOT	EQU	0	; WARM BOOT ADDRESS
CS$OFF	EQU	6	; CONSOLE STATUS OFFSET
CIN$OFF	EQU	9	; CONSOLE INPUT OFFSET

;
;  PAUSE ROUTINE
;	HL = N 10THS OF A SEC, B = PROCESSOR SPEED
;
;  COMPUTATION OF TIME DELAY CONSTANT:
;	INITIAL OVERHEAD	49 CYCLES
;	TERMINATING OVERHEAD	50 CYCLES
;	PROCESSOR SPEED (P)	(10+15)*P CYCLES
;	MAJOR OVERHEAD		TIME*132 CYCLES
;	N-COUNT OVERHEAD	(5+24)*N CYCLES
;	** REQUIRED TOTAL **	100,000 CYCLES (1/10 SEC AT P=1)
;
;  SINCE THIS IS A GUESTIMATE ANYWAY AND PROCESSOR SPEED WILL NOT BE EXACTLY
;  P MHZ, I WILL THROW OUT THE PROCESSOR SPEED DELAY (AT MOST 100 CYCLES)
;
;  CALCULATIONS:  100,000 = 49 + 50 + TIME*132 + 29*N
;		TIME = (100,000 - 49 - 50 - 29*N)/132
;		TIME = (99,901 - 29*N)/132
;  CHART:
;		 N	TIME
;		  1	 757	1/10 SEC
;		  2	 756
;		  3	 756
;		  4	 756
;		  5	 756	1/2 SEC
;		 10	 755	1 SEC
;		 15	 754
;		 20	 752	2 SECS
;		 25	 751
;		 50	 746	5 SECS
;		100	 735	10 SECS
;		500	 647	50 SECS
;
;  SINCE MOST CALLS TO THIS ROUTINE WILL REQUIRE BETWEEN 1/10 AND 5 SECS,
;  I SHALL SELECT AN "AVERAGE" TIME CONSTANT OF (757+746)/2 = 752
;  SINCE AN "AVERAGE" CLOCK IS 2+ OR 4+ MHZ, I SHALL FUDGE THIS (THRU PRACTICE)
;  TO 740
;
TIME	EQU	700	; TIME CONSTANT
PAUSE::
	PUSH	H	; SAVE REGS [4*11 = 44]
	PUSH	D
	PUSH	B
	PUSH	PSW
	MOV	C,B	; SAVE PROCESSOR SPEED IN C [5]
;
;  THE ABOVE INSTRUCTIONS REPRESENT THE INITIAL OVERHEAD = 49 CYCLES
;
PAUSL:
	MOV	B,C	; GET PROCESSOR SPEED [5]
PAUSL1:
	LXI	D,TIME	; GET DELAY CONSTANT [10]
;
;  THE ABOVE INSTRUCTIONS REPRESENT PART OF THE PROCESSOR SPEED OVERHEAD = 15
;
PAUSL2:
	XTHL		; LONG INSTRUCTION FOR DELAY [6*18 = 108]
	XTHL
	XTHL
	XTHL
	XTHL
	XTHL
	DCX	D	; COUNT DOWN INNER-MOST LOOP [5]
	MOV	A,D	; DONE?	[5]
	ORA	E	; [4]
	JNZ	PAUSL2	; [10]
;
;  THE ABOVE INSTRUCTIONS REPRESENT THE MAJOR OVERHEAD = TIME*(108+5+5+4+10)
;	= TIME*132
;
	DCR	B	; COUNT DOWN 10TH-SEC LOOP [5]
	JNZ	PAUSL1	; [10]
;
;  THE ABOVE INSTRUCTIONS REPRESENT THE REST OF THE PROCESSOR SPEED OVERHEAD
;	= 15
;
	DCX	H	; COUNT DOWN N 10THS LOOP [5]
	MOV	A,H	; DONE? [5]
	ORA	L	; [4]
	JNZ	PAUSL	; [10]
;
;  THE ABOVE INSTRUCTIONS REPRESENT THE N-COUNT OVERHEAD = 24 CYCLES
;
	POP	PSW	; RESTORE REGS [4*10 = 40]
	POP	B
	POP	D
	POP	H
	RET		; [10]
;
;  THE ABOVE INSTRUCTIONS REPRESENT THE TERMINATING OVERHEAD = 50 CYCLES
;

	END
